Abstract: A structure and method operable to create a reusable template for detachable thin semiconductor substrates is provided. The template has a shape such that the 3-D shape is substantially retained after each substrate release. Prior art reusable templates may have a tendency to change shape after each subsequent reuse; the present disclosure aims to address this and other deficiencies from the prior art, therefore increasing the reuse life of the template.

Abstract: Photovoltaic modules including a plurality of solar cells bonded to a module back sheet are described herein, wherein each solar cell includes a superstrate bonded to a front side of a photovoltaic device to facilitate handling of very thin photovoltaic devices during fabrication of the module. Modules may also include module front sheets and the solar cells may include bottom sheets. The modules may be made of flexible materials, and may be foldable. Fabrication processes include tabbing photovoltaic devices prior to attaching the individual superstrates.

Abstract: This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re-usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.

Abstract: Methods of fabricating metal wrap through solar cells and modules for thin silicon solar cells, including epitaxial silicon solar cells, are described. These metal wrap through solar cells have a planar back contact geometry for the base and emitter contacts. Fabrication of a metal wrap through solar cell may comprise: providing a photovoltaic device attached at the emitter side of the device to a solar glass by an encapsulant, the device including busbars on the device emitter; forming vias through the device base and emitter, the vias terminating in the busbars; depositing a conformal dielectric film over the surface of the vias and the back surface of the base; removing portions of the conformal dielectric film from the ends of the vias for exposing the busbars and from field areas of the base; and forming separate electrical contacts to the busbars and the field areas on the back surface of the solar cell.

Abstract: This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re-usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.

Abstract: It is an object of this disclosure to provide high productivity, low cost-of-ownership manufacturing equipment for the high volume production of photovoltaic (PV) solar cell device architecture. It is a further object of this disclosure to reduce material processing steps and material cost compared to existing technologies by using gas-phase source silicon. The present disclosure teaches the fabrication of a sacrificial substrate base layer that is compatible with a gas-phase substrate growth process. Porous silicon is used as the sacrificial layer in the present disclosure. Further, the present disclosure provides equipment to produce a sacrificial porous silicon PV cell-substrate base layer.

Abstract: This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation).

Abstract: A structure and method operable to create a reusable template for detachable thin semiconductor substrates is provided. The template has a shape such that the 3-D shape is substantially retained after each substrate release. Prior art reusable templates may have a tendency to change shape after each subsequent reuse; the present disclosure aims to address this and other deficiencies from the prior art, therefore increasing the reuse life of the template.

Abstract: Methods for manufacturing three-dimensional thin-film solar cells using a template. The template comprises a template substrate comprising a plurality of three-dimensional surface features. The three-dimensional thin-film solar cell substrate is formed by forming a sacrificial layer on the template, subsequently depositing a semiconductor layer, selectively etching the sacrificial layer, and releasing the semiconductor layer from the template. Select portions of the three-dimensional thin-film solar cell substrate are then doped with a first dopant, while other select portions are doped with a second dopant. Next, selective emitter and base metallization regions are formed using a PECVD shadow mask process.

Abstract: A Schottky contact photovoltaic energy conversion cell. The Schottky contact photovoltaic energy conversion cell comprises a flexible substrate and a first array of a plurality of closely-spaced microscale pillars connected to a first electrical cell contact. The pillars and the contact are formed of (or having a top) layer of a first Schottky metal material with a work function selected for efficiently collecting photogenerated electrons. The Schottky contact photovoltaic energy conversion cell further comprises a second array of a plurality of closely-spaced microscale pillars connected to a second electrical cell contact. The pillars and the contact are formed of (or having a top) layer of a second Schottky metal material with a work function selected for efficiently collecting photogenerated holes.

Abstract: A method for void free filling with in-situ doped amorphous silicon of a deep trench structure is provided in which a first fill is carried out in a way so that film deposition occurs from the bottom of the trench upwards, with step coverage well in excess of 100%. In a second fill step, deposition conditions are changed to reduce the impact of dopant on deposition rate, and deposition proceeds at a rate which exceeds the deposition rate of the first fill. In an application of this method to the formation of deep trench capacitor structures, the intermediate steps further including the capping of the void free filled trench with a thick layer of amorphous silicon, planarization of the wafer thereafter, followed by a thermal anneal to re-distribute the dopant within the filled trench. Thereafter, additional steps can be performed to complete the formation of the capacitor structure.

Abstract: Methods here disclosed provide for selectively coating the top surfaces or ridges of a 3-D substrate while avoiding liquid coating material wicking into micro cavities on 3-D substrates. The substrate includes holes formed in a three-dimensional substrate by forming a sacrificial layer on a template. The template includes a template substrate with posts and trenches between the posts. The steps include subsequently depositing a semiconductor layer and selectively etching the sacrificial layer. Then, the steps include releasing the semiconductor layer from the template and coating the 3-D substrate using a liquid transfer coating step for applying a liquid coating material to a surface of the 3-D substrate. The method may further include coating the 3-D substrate by selectively coating the top ridges or surfaces of the substrate.

Abstract: A method for void free filling with in-situ doped amorphous silicon of a deep trench structure is provided in which a first fill is carried out in a way so that film deposition occurs from the bottom of the trench upwards, with step coverage well in excess of 100%. In a second fill step, deposition conditions are changed to reduce the impact of dopant on deposition rate, and deposition proceeds at a rate which exceeds the deposition rate of the first fill. In an application of this method to the formation of deep trench capacitor structures, the intermediate steps further including the capping of the void free filled trench with a thick layer of amorphous silicon, planarization of the wafer thereafter, followed by a thermal anneal to re-distribute the dopant within the filled trench. Thereafter, additional steps can be performed to complete the formation of the capacitor structure.

Abstract: A method for void free filling with in-situ doped amorphous silicon of a deep trench structure is provided in which a first fill is carried out in at a temperature, pressure and dopant to silane ratio such that film deposition occurs from the bottom of the trench upwards. By way of this first fill, step coverages well in excess 100% are achieved. In the second fill step, deposition is carried out under changed conditions so as to reduce the impact of dopant on deposition rate, whereby trench fill is completed at a deposition rate which exceeds the deposition rate of the first fill. In an application of this method to the formation of deep trench capacitor structures, the intermediate steps further including the capping of the void free filled trench with a thick layer of amorphous silicon, planarization of the wafer thereafter, followed by a thermal anneal to re-distribute the dopant within the filled trench. Thereafter, additional steps can be performed to complete the formation of the capacitor structure.

Abstract: A Schottky contact photovoltaic energy conversion cell. The Schottky contact photovoltaic energy conversion cell comprises a flexible substrate and a first array of a plurality of closely-spaced microscale pillars connected to a first electrical cell contact. The pillars and the contact are formed of (or having a top) layer of a first Schottky metal material with a work function selected for efficiently collecting photogenerated electrons. The Schottky contact photovoltaic energy conversion cell further comprises a second array of a plurality of closely-spaced microscale pillars connected to a second electrical cell contact. The pillars and the contact are formed of (or having a top) layer of a second Schottky metal material with a work function selected for efficiently collecting photogenerated holes.

Abstract: Various computer-implemented methods are provided. One computer-implemented method for determining information about a defect detected on a wafer after an immersion lithography (IL) process is performed on the wafer includes comparing inspection results for the defect to data in a defect library for different types of IL defects and determining the information about the defect based on results of the comparison. One computer-implemented method for binning defects detected on a wafer after an IL process is performed on the wafer includes comparing one or more characteristics of the defects to one or more characteristics of IL defects and one or more characteristics of non-IL defects. The method also includes binning the defects having one or more characteristics that substantially match the one or more characteristics of the IL defects and the non-IL defects in different groups.

Abstract: A method for void free filling with in-situ doped amorphous silicon of a deep trench structure is provided in which a first fill is carried out in at a temperature, pressure and dopant to silane ratio such that film deposition occurs from the bottom of the trench upwards. By way of this first fill, step coverages well in excess 100% are achieved. In the second fill step, deposition is carried out under changed conditions so as to reduce the impact of dopant on deposition rate, whereby trench fill is completed at a deposition rate which exceeds the deposition rate of the first fill. In an application of this method to the formation of deep trench capacitor structures, the intermediate steps further including the capping of the void free filled trench with a thick layer of amorphous silicon, planarization of the wafer thereafter, followed by a thermal anneal to re-distribute the dopant within the filled trench. Thereafter, additional steps can be performed to complete the formation of the capacitor structure.

Abstract: A method for void free filling with in-situ doped amorphous silicon of a deep trench structure is provided in which a first fill is carried out in at a temperature, pressure and dopant to silane ratio such that film deposition occurs from the bottom of the trench upwards. By way of this first fill, step coverages well in excess 100% are achieved. In the second fill step, deposition is carried out under changed conditions so as to reduce the impact of dopant on deposition rate, whereby trench fill is completed at a deposition rate which exceeds the deposition rate of the first fill. In an application of this method to the formation of deep trench capacitor structures, the intermediate steps further including the capping of the void free filled trench with a thick layer of amorphous silicon, planarization of the wafer thereafter, followed by a thermal anneal to re-distribute the dopant within the filled trench. Thereafter, additional steps can be performed to complete the formation of the capacitor structure.

Abstract: A method for void free filling with in-situ doped amorphous silicon of a deep trench structure is provided in which a first fill is carried out in at a temperature, pressure and dopant to silane ratio such that film deposition occurs from the bottom of the trench upwards. By way of this first fill, step coverages well in excess 100% are achieved. In the second fill step, deposition is carried out under changed conditions so as to reduce the impact of dopant on deposition rate, whereby trench fill is completed at a deposition rate which exceeds the deposition rate of the first fill. In an application of this method to the formation of deep trench capacitor structures, the intermediate steps further including the capping of the void free filled trench with a thick layer of amorphous silicon, planarization of the wafer thereafter, followed by a thermal anneal to re-distribute the dopant within the filled trench. Thereafter, additional steps can be performed to complete the formation of the capacitor structure.

Abstract: A silicon nitride layer is deposited on a substrate within a processing region by introducing a silicon containing precursor into the processing region, exhausting gases in the processing region including the silicon containing precursor while uniformly, gradually reducing a pressure of the processing region, introducing a nitrogen containing precursor into the processing region, and exhausting gases in the processing region including the nitrogen containing precursor while uniformly, gradually reducing a pressure of the processing region. During the steps of exhausting, the slope of the pressure decrease with respect to time is substantially constant.