Abstract: A photomask structure including a layout pattern, a first L-type assist pattern, and a second L-type assist pattern is provided. An end portion of the layout pattern includes a first edge, a second edge, and a third edge. The second edge is connected to one end of the first edge, and the third edge is connected to another end of the first edge. The first L-type assist pattern is located between the second L-type assist pattern and the first edge. The layout pattern, the first L-type assist pattern, and the second L-type assist pattern are separated from each other. The first L-type assist pattern surrounds the first edge and the second edge. The second L-type assist pattern surrounds the first edge and the third edge.

Abstract: A method includes providing a layout pattern to a computer system. The layout pattern includes a first pattern, a second pattern, and a third pattern. A central line defined by connecting a line end of the second pattern and a line end of the third pattern overlaps with a middle portion of the first pattern. An optical proximity correction (OPC) is performed on the layout pattern to form a first auxiliary pattern. The first auxiliary pattern includes a first stripe pattern and a second stripe pattern both extending from the line end of the second pattern. The second stripe pattern is closer to the first pattern than the first stripe pattern, and an extending length of the second stripe pattern is less than an extending length of the first stripe pattern. The layout pattern and the first auxiliary pattern are outputted through the computer system onto a photomask.

Abstract: A photomask structure having a first region and a second region is provided. The layout pattern density of the first region is smaller than the layout pattern density of the second region. The photomask structure includes a first layout pattern, a second layout pattern, and first assist patterns. The first layout pattern is located in the first region and the second region. The second layout pattern is located in the second region. The second layout pattern is located on one side of the first layout pattern. The first assist patterns are located on the first sidewall of the first layout pattern and separated from each other. The first sidewall is adjacent to the second layout pattern. The first assist patterns are adjacent to a boundary between the first region and the second region. The lengths of two adjacent first assist patterns decrease in the direction away from the boundary.

Abstract: A photomask structure including a layout pattern and at least one assist pattern is provided. The layout pattern includes corners. The assist pattern wraps at least one of the corners. There is a gap between the edge of the layout pattern and the assist pattern.

Abstract: Described herein is a cell culture system for constructing a perfusable network of self-assembled cells comprising a multi-well plate embedded with microchannels connecting a central well with at least one inlet well and at least one outlet well, the central well for culturing seeded cells within an extracellular matrix, wherein the perfusable network allows perfusion through the microchannels connecting the central well with at least one inlet well and at least one outlet well. The cell culture system allows the array of perfusable networks formed, connected, and perfused inside the multi-well plate to be accessible and/or extractable from the top of the central well. In aspect, the cell culture system can improve the experimental throughputs of organ-on-a-chip systems and expand the application of microphysiological systems to regenerative cell therapy. A perfusable network of self-assembled cells and method of making thereof using the cell culture system described herein are also provided.

Abstract: A method of designing a semiconductor device includes creating a library for test patterns on a frame and an on purpose violation layout on a main chip of a layout, and then creating filter marks according to the library. An OPC (optical proximity correction) is run using the layout, and an OPC verifying is performed for obtaining a pattern with hot spots to determine whether the hot spots are within the frame and the filter marks. When the hot spots are within the frame and the filter marks, a mask can be made. When the hot spots are outside the frame and the filter marks, it is necessary to check whether the hot spots need to be repaired. When the hot spots are within the frame and outside the filter marks, the hot spots are added into the library as data of the on purpose violation layout.

Abstract: A control method for a touch display device including a display panel is provided. The display panel includes multiple first gate lines and multiple second gate lines respectively corresponding to a first field and a second field of a frame, and multiple sensing electrodes for touch sensing. Within one single frame period, the control method includes: scanning the first gate lines to update the first field; controlling the sensing electrodes to perform touch sensing and providing a first touch report; scanning the second gates lines to update the second field; and controlling the sensing electrodes to perform touch sensing and providing a second touch report. At least one of the first gates lines is located between two of the second gate lines, and at least one of the second gate lines is located between two of the first gate lines.

Abstract: A control method for a touch display device including a display panel is provided. The display panel includes multiple first gate lines and multiple second gate lines respectively corresponding to a first field and a second field of a frame, and multiple sensing electrodes for touch sensing. Within one single frame period, the control method includes: scanning the first gate lines to update the first field; controlling the sensing electrodes to perform touch sensing and providing a first touch report; scanning the second gates lines to update the second field; and controlling the sensing electrodes to perform touch sensing and providing a second touch report. At least one of the first gates lines is located between two of the second gate lines, and at least one of the second gate lines is located between two of the first gate lines.

Abstract: A light emitting diode (LED) driving system drives a plurality of LED strings. A plurality of current sources are respectively connected to the plurality of LED strings. A multi-phase control signal generator generates a plurality of multi-phase control signals that respectively maintain turn on or turn off states of the current sources so as to selectively conduct the corresponding LED strings.

Abstract: An ultra-low-power display control circuit and associated method is provided. The ultra-low-power display control circuit comprises a power conversion controller, a first capacitor, a transforming device, a second capacitor, a regulator, an opto-coupler and a display controller. The first capacitor couples to the power conversion controller and the transforming device. The transforming device converts the relatively-high voltage to a relatively-low voltage. The second capacitor stabilizes the relatively-low voltage. The regulator regulates the relatively-low voltage to generate a regulated voltage output. The display controller is powered by the regulated voltage output. The display controller controls the magnitude of a coupling current of the opto-coupler to activate or deactivate the power conversion controller.

Abstract: A flat panel display device, LCD controller and associated method is provided. The flat panel display device includes a display panel, a lamp for providing a backlight source for the display panel, a power transformation module for providing a power source for the lamp, a non-volatile storage unit for storing program code, and a display controller. The display controller includes an image processing module for processing image data and outputting processed results to the display panel, and a digital pulse width modulation module for adjusting on and off time of the power transformation module with reference to a synchronization signal.

Abstract: A low-voltage-driven boost circuit is provided. The boost circuit includes an inductor, a diode, a capacitor, a first switch and a second switch. The second switch is coupled between the first switch and an anode of the diode. The first switch selectively conducts according to a switch signal, and the second switch conducts as the first switch conducts.

Abstract: A feedback regulating circuit provides a regulated voltage to a multi-output circuit that outputs a plurality of output voltages. The feedback regulating circuit includes a voltage control unit, coupled to the plurality of output voltages, for generating a first voltage according to the plurality of output voltages and outputting a voltage control signal according to the first voltage; and a reference voltage generator, coupled to the voltage control unit, for receiving the voltage control signal and generating a reference voltage according to the voltage control signal, with the reference voltage being fed back to the multi-output circuit to regulate voltage to a high degree of accuracy.

Abstract: A light emitting diode (LED) driving system drives a plurality of LED strings. A plurality of current sources are respectively connected to the plurality of LED strings. A multi-phase control signal generator generates a plurality of multi-phase control signals that respectively maintain turn on or turn off states of the current sources so as to selectively conduct the corresponding LED strings.

Abstract: A regulated voltage protection circuit includes a bias-voltage generating circuit and a clamping circuit. The bias-voltage generating circuit provides a bias-voltage. The clamping circuit is coupled to a plurality of light-emitting diode (LED) strings and a driving circuit, and generates a plurality of clamped voltages that are respectively transmitted to a plurality of input pads of the driving circuit according to the bias-voltage. The regulation voltage protection circuit protects against electrical overstress (EOS) by protecting the driving circuit during low-voltage fabrication process chip manufacturing.

Abstract: A DC converter and a mode-switching method used in an electronic apparatus are included. The electronic apparatus includes a subsystem circuit. The DC power converter comprises a first voltage converting circuit electrically connected to the subsystem circuit, receiving a system voltage and a first reference voltage, and converting the system voltage to a first output voltage based on the first reference voltage; and a second voltage converting circuit electrically connected to the subsystem circuit and receiving the system voltage and a second reference voltage, and converting the system voltage to a second output voltage to the same output end of the first voltage converting circuit based on the second reference voltage; wherein the second voltage converting circuit outputs the second output voltage to the subsystem circuit when the first output voltage at the output end is smaller than a threshold.

Abstract: A voltage generating circuit for generating a plurality of associated voltages includes a constant current source for generating a constant current; a plurality of resistors connected in series to the constant current source in series for generating a plurality of associated reference voltages; and a first controlled switch connected to a first resistor in parallel, wherein the plurality of associated reference voltages are changed by optionally conducting the first controlled switch to control the flow of the constant current through the first resistor.

Abstract: The present invention discloses a backlight driving signal generator used in a liquid crystal display (LCD) controller. The backlight driving signal generator is coupled to a backlight driving circuit of the LCD and capable of issuing a first pulse signal and a second pulse signal to control the backlight driving circuit to function accordingly. In a preferred aspect, the backlight signal generator is capable of being adapted for the backlight driving circuit of cold cathode fluorescent lamps (CCFLs) or that of light emitting diodes (LEDs).

Abstract: An ultra-low-power display control circuit and associated method is provided. The ultra-low-power display control circuit comprises a power conversion controller, a first capacitor, a transforming device, a second capacitor, a regulator, an opto-coupler and a display controller. The first capacitor couples to the power conversion controller and the transforming device. The transforming device converts the relatively-high voltage to a relatively-low voltage. The second capacitor stabilizes the relatively-low voltage. The regulator regulates the relatively-low voltage to generate a regulated voltage output. The display controller is powered by the regulated voltage output.

Abstract: A voltage generating circuit for generating a plurality of associated voltages includes a constant current source for generating a constant current; a plurality of resistors connected in series to the constant current source in series for generating a plurality of associated reference voltages; and a first controlled switch connected to a first resistor in parallel, wherein the plurality of associated reference voltages are changed by optionally conducting the first controlled switch to control the flow of the constant current through the first resistor.