Abstract: A full-bridge soft switching inverter and a driving method thereof, using zero-voltage switching and conducting a circular current in a circuit including two n-channel MOSFET's so as to drive at least one load such as a cold cathode fluorescent lamp (CCFL) and a signal output device and to achieve low switching loss with high efficiency. The full-bridge soft switching inverter comprises a full-bridge circuit configuration including a first p-channel MOSFET having a first gate, a first drain and a first source; a first n-channel MOSFET having a second gate, a second drain and a second source; a second p-channel MOSFET having a third gate, a third drain and a third source; and a second n-channel MOSFET having a fourth gate, a fourth drain and a fourth source. The first gate driving signal and the second gate driving signal are substantially in-phase, while the third gate driving signal and the fourth gate driving signal are substantially in-phase.

Abstract: The present invention discloses a backlight driving signal generator used in a liquid crystal display (LCD) controller. The backlight driving signal generator is coupled to a backlight driving circuit of the LCD and capable of issuing a first pulse signal and a second pulse signal to control the backlight driving circuit to function accordingly. In a preferred aspect, the backlight signal generator is capable of being adapted for the backlight driving circuit of cold cathode fluorescent lamps (CCFLs) or that of light emitting diodes (LEDs).

Abstract: A switching controller having frequency hopping is used for reducing the EMI of a power supply. A pattern generator generates a digital pattern code in response to a clock signal. An oscillator generates an oscillation signal for determining a switching frequency of a switching signal. A programmable capacitor coupled to the oscillator modulates the switching frequency in response to the variation of the digital pattern code. An attenuator connected to a voltage feedback loop attenuates a feedback signal. The feedback signal controls the pulse width of the switching signal. A programmable resistor coupled to the attenuator determines an attenuation rate of the attenuator in response to the digital pattern code. The attenuation rate is increased as the switching frequency increases. The pulse width of the switching signal is thus reduced, which compensates the decrease of the switching period and keeps the output power and the output voltage constant.

Abstract: A backlight module, inverter, and DC voltage generating method thereof is disclosed. The inverter of the backlight includes a power converting device, a transformer, and a rectification circuit. The power converting device is coupled to a first DC voltage for outputting a first AC voltage. The transformer includes a primary coil, and a first secondary coil. The primary coil is coupled to the first AC voltage outputted by the power converting device. The first secondary coil is for outputting a second AC voltage by inducing the first AC voltage. The rectification circuit is coupled to the first secondary coil for rectifying the second AC voltage and outputting a second DC voltage.

Abstract: A switching controller having frequency hopping is used for reducing the EMI of a power supply. A pattern generator generates a digital pattern code in response to a clock signal. An oscillator generates an oscillation signal for determining a switching frequency of a switching signal. A programmable capacitor coupled to the oscillator modulates the switching frequency in response to the variation of the digital pattern code. An attenuator connected to a voltage feedback loop attenuates a feedback signal. The feedback signal controls the pulse width of the switching signal. A programmable resistor coupled to the attenuator determines an attenuation rate of the attenuator in response to the digital pattern code. The attenuation rate is increased as the switching frequency increases. The pulse width of the switching signal is thus reduced, which compensates the decrease of the switching period and keeps the output power and the output voltage constant.

Abstract: A switching frequency jitter having output ripple cancel includes a pattern generator generating a pattern code in response to a clock signal. An oscillator generates an oscillation signal for determining a switching frequency of a switching signal in response to the variation of the pattern code. An attenuator is connected to a voltage feedback loop for attenuating a feedback signal. The feedback signal is utilized to control the pulse width of the switching signal. A programmable resistor is connected to the attenuator for programming an attenuation rate of the attenuator in response to the pattern code. The attenuation rate is increased whenever the switching frequency increases. The pulse width of the switching signal is thus reduced, which compensates the decrease of the switching period and keeps the output power and the output voltage of the power supply constant.

Abstract: A flat panel display device, LCD controller and associated method is provided. The flat panel display device includes a display panel, a lamp for providing a backlight source for the display panel, a power transformation module for providing a power source for the lamp, a non-volatile storage unit for storing program code, and a display controller. The display controller includes an image processing module for processing image data and outputting processed results to the display panel, and a digital pulse width modulation module for adjusting on and off time of the power transformation module with reference to a synchronization signal.

Abstract: A full-bridge soft switching inverter and a driving method thereof, using zero-voltage switching and conducting a circular current in a circuit including two n-channel MOSFET's so as to drive at least one load such as a cold cathode fluorescent lamp (CCFL) and a signal output device and to achieve low switching loss with high efficiency. The full-bridge soft switching inverter comprises a full-bridge circuit configuration including a first p-channel MOSFET having a first gate, a first drain and a first source; a first n-channel MOSFET having a second gate, a second drain and a second source; a second p-channel MOSFET having a third gate, a third drain and a third source; and a second n-channel MOSFET having a fourth gate, a fourth drain and a fourth source. The first gate driving signal and the second gate driving signal are substantially in-phase, while the third gate driving signal and the fourth gate driving signal are substantially in-phase.

Abstract: A half-bridge flyback power converter is provided. The half-bridge flyback power converter comprises a high-side switch and a low-side switch periodically conducting an input voltage to a primary winding of a transformer. When the high-side switch and the low-side switch are switched off, energy stored in the transformer is transmitted to a secondary circuit and serves to charge a bulk capacitor. A forward diode facilitates to combine the input voltage with a voltage across the bulk capacitor for powering the secondary circuit. Therefore, the power consumption of the leakage inductance is reduced and circuit topology is simplified.

Abstract: The present invention introduces an integrated analog multiplier-divider circuit. The multiplier-divider block according to the present invention is ideal for use in the power factor correction (PFC) controllers of many switch-mode power supplies. The analog multiplier-divider according to the present invention is built with CMOS devices. Because of this, it has many advantages over prior-art multiplier-dividers. One important advantage is that the die-size and the cost can be reduced. Another important advantage of the multiplier-divider according to the present invention is substantially reduced temperature dependence.

Abstract: A PWM controller having frequency jitter includes a modulator for generating a first jitter current and a second jitter current. An oscillator generates a pulse signal for producing a switching frequency in response to the modulation of the first jitter current. An attenuator is connected in a voltage feedback loop for attenuating a feedback signal to an attenuated feedback signal, in which the attenuated feedback signal is utilized to control an on-time of a switching signal. A variable-resistance circuit is connected with the attenuator for programming an attenuation rate of the attenuator in response to the modulation of the second jitter current. The switching frequency increases whenever the first jitter current increases. Meanwhile, the impedance of the attenuator will decreases and the attenuation rate will increase whenever the second jitter current increase.

Abstract: A switching frequency jitter having output ripple cancel includes a pattern generator generating a pattern code in response to a clock signal. An oscillator generates an oscillation signal for determining a switching frequency of a switching signal in response to the variation of the pattern code. An attenuator is connected to a voltage feedback loop for attenuating a feedback signal. The feedback signal is utilized to control the pulse width of the switching signal. A programmable resistor is connected to the attenuator for programming an attenuation rate of the attenuator in response to the pattern code. The attenuation rate is increased whenever the switching frequency increases. The pulse width of the switching signal is thus reduced, which compensates the decrease of the switching period and keeps the output power and the output voltage of the power supply constant.

Abstract: A switching controller having frequency hopping is used for reducing the EMI of a power supply. A pattern generator generates a digital pattern code in response to a clock signal. An oscillator generates an oscillation signal for determining a switching frequency of a switching signal. A programmable capacitor coupled to the oscillator modulates the switching frequency in response to the variation of the digital pattern code. An attenuator connected to a voltage feedback loop attenuates a feedback signal. The feedback signal controls the pulse width of the switching signal. A programmable resistor coupled to the attenuator determines an attenuation rate of the attenuator in response to the digital pattern code. The attenuation rate is increased as the switching frequency increases. The pulse width of the switching signal is thus reduced, which compensates the decrease of the switching period and keeps the output power and the output voltage constant.

Abstract: A half-bridge flyback power converter is provided. The half-bridge flyback power converter comprises a high-side switch and a low-side switch periodically conducting an input voltage to a primary winding of a transformer. When the high-side switch and the low-side switch are switched off, energy stored in the transformer is transmitted to a secondary circuit and serves to charge a bulk capacitor. A forward diode facilitates to combine the input voltage with a voltage across the bulk capacitor for powering the secondary circuit. Therefore, the power consumption of the leakage inductance is reduced and circuit topology is simplified.

Abstract: A PWM controller having frequency jitter includes a modulator for generating a first jitter current and a second jitter current. An oscillator generates a pulse signal for producing a switching frequency in response to the modulation of the first jitter current. An attenuator is connected in a voltage feedback loop for attenuating a feedback signal to an attenuated feedback signal, in which the attenuated feedback signal is utilized to control an on-time of a switching signal. A variable-resistance circuit is connected with the attenuator for programming an attenuation rate of the attenuator in response to the modulation of the second jitter current. The switching frequency increases whenever the first jitter current increases. Meanwhile, the impedance of the attenuator will decreases and the attenuation rate will increase whenever the second jitter current increase.

Abstract: A single stage PFC power converter is provided for performing a PFC function in a half-bridge flyback power converter. A high-side switch and a low-side switch periodically supply an input voltage to a primary winding of a transformer. When the high-side switch and low-side switch are switched off, the energy stored in the transformer will be transmitted to a secondary circuit and charged to a bulk capacitor. The bulk capacitor serves to recycle the energy and reduce the output ripple noise. A forward diode and a forward inductor serve to forward the energy of the bulk capacitor to the flowing path of the input voltage for performing PFC function.

Abstract: A switching power supply control-circuit according to the present invention uses bleeding resistors to charge a start-up capacitor and discharge an EMI filter. No extra discharge device is needed to accelerate the discharge of the input capacitor, since the start-up capacitor is charged up by the AC input source. A latch circuit of the power supply can be quickly reset after the AC input source is shut off. After the control-circuit begins to operate, the auxiliary winding of the transformer will power the control-circuit. To further reduce power consumption, the auxiliary winding generates a bias voltage to enable line-voltage detection. This allows the power supply to perform line-voltage detection and startup, without having to connect resistors or transistors to the input capacitor.

Abstract: The present invention introduces an integrated analog multiplier-divider circuit. The multiplier-divider block according to the present invention is ideal for use in the power factor correction (PFC) controllers of many switch-mode power supplies. The analog multiplier-divider according to the present invention is built from CMOS devices. Because of this, it has many advantages over prior-art multiplier-dividers. One important advantage is that the die-size and the cost can be reduced. Another important advantage of the multiplier-divider according to the present invention is substantially reduced temperature dependence.

Abstract: A switching power supply control-circuit according to the present invention uses bleeding resistors to charge a start-up capacitor and discharge an EMI filter. No extra discharge device is needed to accelerate the discharge of the input capacitor, since the start-up capacitor is charged up by the AC input source. A latch circuit of the power supply can be quickly reset after the AC input source is shut off. After the control-circuit begins to operate, the auxiliary winding of the transformer will power the control-circuit. To further reduce power consumption, the auxiliary winding generates a bias voltage to enable line-voltage detection. This allows the power supply to perform line-voltage detection and startup, without having to connect resistors or transistors to the input capacitor.

Abstract: A primary-side flyback power converter supplies a constant voltage and a constant current output. To generate a well-regulated output voltage under varying load conditions, the power converter includes a PWM controller. The PWM controller generates a PWM signal to control a switching transistor in response to a flyback voltage detected from the first primary winding of the power supply transformer. To reduce power consumption, the flyback energy of the first primary winding is used as a DC power source for the PWM controller. The flyback voltage is sampled following a delay time to reduce interference from the inductance leakage of the transformer. To generate a more accurate DC output voltage, a bias current is pulled from the detection input to form a voltage drop across a detection resistor for compensating for the voltage drop of the output rectifying diode.