Abstract: Disclosed herein are a logical qubit execution apparatus and method. The logical qubit execution apparatus may be configured to execute, by a logical execution layer, a quantum circuit including requested logical qubits using a lattice surgery operation, generate, by the logical execution layer, measurement results of the logical qubits by combining measurement results of logical Pauli frames, generate, by a physical execution layer, a physical qubit circuit by converting a logical qubit operation corresponding to the measurement results of the logical qubits into a physical qubit operation, and measure, by the physical execution layer, results of an operation on physical Pauli frames by executing the physical qubit circuit.

Abstract: Provided is a Raman scattering measurement apparatus including a light source which emits light to smoke particles, a filter configured to block light which is incident to the smoke particles and passes through the particle and to allow Raman scattered light to pass therethrough, and a photodetector which detects the Raman scattered light passing through the filter in order to distinguish fire smoke generated due to a true fire from non-fire smoke generated due to daily life or industrial activity. The present invention also provides a fire determination apparatus including a unit which reads a Raman shift from Raman scattered light detected by the photodetector of the Raman scattering measurement apparatus, estimates a smoke component from the read Raman shift, and determines fire/non-fire from the estimated smoke component and a method thereof.

Abstract: A camera module includes a housing, a movable body configured to move in a direction of an optical axis of the housing; a reinforcing member formed integrally on one surface of the movable body, and configured to increase a rigidity of the movable body; and a first buffer member formed in the reinforcing member, and configured to reduce an impactive force between the housing and the movable body.

Abstract: A scroll compressor including a housing, a motor in the housing, an orbiting scroll, and a fixed scroll. An injection valve assembly is provided between the fixed scroll and the housing and further includes a cover plate, a valve plate, a gasket retainer, and an injection valve. The compressor capable of increasing a surface pressure at a position at which the injection valve of the injection valve assembly needs to be supported, and preventing deformation of the gasket retainer by reducing a bead height of the gasket retainer.

Abstract: A camera module includes a housing having an interior space; an Auto Focusing (AF) carrier disposed in the interior space of the housing and housing a lens barrel; a lens holder to which the lens barrel is fixed and accommodated in the AF carrier; an Optical Image Stabilization (OIS) driver configured to drive the lens holder to move in a first direction or a second direction perpendicular to an optical-axis, wherein the first direction and the second direction are perpendicular to each other within the AF carrier; and an OIS stopper including an inward protrusion protruding from one inner surface of the housing in the first direction towards the lens holder, and an outward protrusion protruding from one outer surface of the lens holder towards the one inner surface of the housing and opposite the inward protrusion in the second direction.

Abstract: A variable displacement swash plate type compressor control method and a variable displacement swash plate type compressor controlled thereby may include a first determination step of determining whether liquid refrigerant exists within the variable displacement swash plate type compressor; a first operation step of applying power to the field coil assembly and of not applying current to the electronic control valve, when it is determined in the first determination step S1 that the liquid refrigerant exists; a second determination step of comparing an elapsed period of time of operating in the first operation step with a predetermined reference time; and a second operation step of maintaining the power applied in the first operation step to the field coil assembly and applying current to the electronic control valve when the elapsed period of time is greater than or equal to the reference time.

Abstract: Provided is a vehicle sub-frame including a front cross member, a rear cross member, and left and right side members mounted to connect the front cross member and the rear cross member to each other. Each of the left and right side members has a protrusion that protrudes laterally at a corner portion of a rear end portion thereof, the corner portion being joined to a corner portion of the rear cross member. A weld joint is formed by welding to the rear cross member along a laterally extending portion of a trim line portion of the protrusion, in which the trim line portion of the protrusion is the perimeter of the protrusion.

Abstract: Provided is a vehicle sub-frame including a front cross member, a rear cross member, and left and right side members mounted to connect the front cross member and the rear cross member to each other. Each of the left and right side members has a protrusion that protrudes laterally at a corner portion of a rear end portion thereof, the corner portion being joined to a corner portion of the rear cross member. A weld joint is formed by welding to the rear cross member along a laterally extending portion of a trim line portion of the protrusion, in which the trim line portion of the protrusion is the perimeter of the protrusion.

Abstract: Provided is an adjustable implant for fixing a femur, the adjustable implant allowing a wire wound around a fractured femur to be accurately placed at a desired location even when the desired location is changed depending on a patient. The adjustable implant includes: a body (100) provided with first locking holes (110) vertically penetrating therethrough at predetermined intervals; a head (200) extending from an upper end of the body (100), and being bent to be in a hook shape for being hooked over a greater trochanter of a femur; and a detachable wire locking part (300) detachably mounted to the body (100) or to the head (200), and supporting a wire (400), wherein the detachable wire locking part (300) includes: base parts (310); and a wire locking member (320) having a coupling member (321) so as to be detachably coupled to each of the base parts (310).

Abstract: Provided are a semiconductor integrated device and a method for fabricating the same. The semiconductor integrated circuit includes a semiconductor substrate including a first dopant, a first conductive layer pattern formed on the semiconductor substrate, an interlayer dielectric layer formed on the first conductive layer pattern, a second conductive layer pattern formed on the interlayer dielectric layer, and a first vacuum ultraviolet (VUV) blocking layer which blocks a VUV ray radiated to the semiconductor substrate.

Abstract: Provided are a semiconductor integrated device and a method for fabricating the same. The semiconductor integrated circuit includes a semiconductor substrate including a first dopant, a first conductive layer pattern formed on the semiconductor substrate, an interlayer dielectric layer formed on the first conductive layer pattern, a second conductive layer pattern formed on the interlayer dielectric layer, and a first vacuum ultraviolet (VUV) blocking layer which blocks a VUV ray radiated to the semiconductor substrate.

Abstract: An electrically erasable and programmable read-only memory (EEPROM) is provided. The EEPROM includes a semiconductor substrate including spaced apart first, second and third active regions, a common floating gate traversing over the first through third active regions, source/drain regions formed in the third active region on opposite sides of the floating gate, a first interconnect connected to the first active region, a second interconnect connected to the second active region, and a third interconnect connected to either one of the source/drain regions.

Abstract: A source driver for controlling a slew rate of a liquid crystal display (LCD) and a method for controlling the slew rate is provided. The source driver includes a plurality of output buffers for driving data lines, and a bias circuit for varying a bias voltage inputted to the output buffers to control a slew rate of the output buffers.

Abstract: An output buffer with an improved output deviation and a source driver of a flat panel display which employs the output buffer wherein the output buffer includes a first input terminal to which a first differential input signal is applied, a second input terminal to which a second differential input signal is applied, an output terminal that generates an output signal based on the second differential input signal and feeds back the output signal to the first input terminal as the first input signal, a first power supply terminal to which a first power supply voltage is applied, a second power supply terminal to which a second power supply voltage is applied, and an amplification unit that amplifies a difference between the first differential input signal and the second differential input signal, pulls up the output signal to the first power supply voltage or pulls down the output signal to the second power supply voltage, and includes a plurality of transistors.

Abstract: In one aspect, an electrically erasable and programmable read-only memory (EEPROM) is provided. The EEPROM includes a semiconductor substrate including spaced apart first, second and third active regions, a common floating gate traversing over the first through third active regions, source/drain regions formed in the third active region on opposite sides of the floating gate, a first interconnect connected to the first active region, a second interconnect connected to the second active region, and a third interconnect connected to either one of the source/drain regions.

Abstract: An electrically erasable and programmable read-only memory (EEPROM) is provided. The EEPROM includes a semiconductor substrate including spaced apart first, second and third active regions, a common floating gate traversing over the first through third active regions, source/drain regions formed in the third active region on opposite sides of the floating gate, a first interconnect connected to the first active region, a second interconnect connected to the second active region, and a third interconnect connected to either one of the source/drain regions.

Abstract: A CMOS image sensor with improved sensitivity includes a main pixel array region of an active pixel array region formed on a semiconductor substrate. A passivation layer is formed over the sensor, and it is at least partially removed from the main pixel array region, such that incident light being detected by the main pixel array does not pass through the passivation layer. Optical absorption and refraction caused by the material of the passivation layer are eliminated, resulting in an image sensor with improved optical sensitivity.

Abstract: A semiconductor device includes at least two transistors and a charge-trapping structure. The charge-trapping structure traps charges, which are moved from a selected transistor toward a non-selected transistor, adjacent to the selected transistor among the transistors, thereby preventing a threshold voltage of the non-selected transistor from being increased. Thus, the charge-trapping structure traps the charges so that an increase of the threshold voltage of the non-selected voltage is suppressed.

Abstract: A semiconductor device includes a pad electrode layer and an align mark layer, formed on the semiconductor substrate. A passivation layer is formed on the semiconductor substrate and exposes at least a portion of the top of the pad electrode layer and at least a portion of the top of the align mark layer. A light-transmitting protecting layer covers at least a portion of the passivation layer, exposes the top portion of the pad electrode layer exposed from the passivation layer, and covers the portion of the align mark layer exposed from the passivation layer.

Abstract: A method of fabricating a semiconductor device including gate dielectrics having different thicknesses may be provided. A method of fabricating a semiconductor device may include providing a substrate having a higher voltage device region and a lower voltage device region, forming an anti-oxidation layer on the substrate, and selectively removing portions of the anti-oxidation layer on the substrate. The method may also include performing a first thermal oxidization on the substrate to form a field oxide layer on the selectively removed portions of the anti-oxidation layer, removing the anti-oxidation layer disposed on the higher voltage device region, performing a second thermal oxidization on the substrate to form a central higher voltage gate oxide layer on the higher voltage device region, removing the anti-oxidation layer disposed on the lower voltage device region, and performing a third thermal oxidization on the substrate to form a lower voltage gate oxide layer on the lower voltage device region.