Abstract: A memory device includes a driver that drives a data line connected with an external device, an internal ZQ manager that generates an internal ZQ start signal, a selector that selects one of the internal ZQ start signal and a ZQ start command from the external device, based on a ZQ mode, a ZQ calibration engine that generates a ZQ code by performing ZQ calibration in response to a selection result of the selector, and a ZQ code register that loads the ZQ code onto the driver in response to a ZQ calibration command from the external device.

Abstract: An embodiment of the disclosure discloses an electronic device including at least one camera module to capture an image based on a specified angle of view, a display to display the image, a processor electrically connected with the camera module and the display. The processor detects a plurality of objects in the image, and performs setting of image data associated with at least one object of the plurality of objects such that a region, which corresponds to the at least one object, in a screen region of the display has a specified light transmittance value. Moreover, various embodiment found through the disclosure are possible.

Abstract: A semiconductor package includes: a first wiring structure including a first wiring layer, and a second wiring layer disposed on the first wiring layer, and connected to a first connecting structure placed disposed on the first wiring layer; a first semiconductor chip disposed on the first wiring structure and connected to the first wiring structure through a first connecting pad disposed on a first side of the first semiconductor chip; a second wiring structure disposed on the first semiconductor chip; and an insulating member disposed between the first and second wiring structures, wherein the first wiring structure further includes a first signal pattern that is electrically connected to the first connecting pad, and the first signal pattern redistributes the first connecting pad to the first connecting structure via the insulating member.

Abstract: A battery cell having an electrode assembly having a hollow structure with a hexagonal prism-shaped hole at a center, of which an exterior of the electrode assembly is in a shape of a hexagonal prism, and a cell case in which the electrode assembly is received, of which an exterior of the cell case is in a shape of a hexagonal prism is provided.

Abstract: Methods and apparatus to model on/off states of media presentation devices based on return path data are disclosed. An apparatus includes a memory and processor circuitry to execute instructions stored in the memory to: generate a first probability distribution indicative of actual durations of panel tuning segments, the panel tuning segments corresponding to time periods during which panelists were exposed to first media; generate a second probability distribution indicative of modelled durations of modelled tuning segments, the modelled tuning segments corresponding to modified lengths of the panel tuning segments; and estimate a set-on time for a media set associated with an RPD device based on RPD tuning information and the first and second probability distributions, the RPD tuning information reported from the RPD device, the RPD tuning information indicative of a reported RPD tuning segment during which the RPD device was accessing second media.

Abstract: A method of operating a memory device is provided. The method includes: receiving a first command from a controller; activating a page of a memory cell array based on the first command; reading data of the activated page; detecting an error from the read data; correcting the detected error to generate error correction data; writing back the error correction data to the activated page in based on the detected error being a single-bit error; and blocking write-back of the error correction data to the activated page based on the detected error being a multi-bit error.

Abstract: Disclosed examples determine a duplicated audience size representative of panelists exposed to television media and digital media; determine a panel duplication reach based on the duplicated audience size and a panelist population; determine a did-not-view reach based on a television audience size, a digital audience size, the duplicated audience size, and the panelist population; obtain an overlap multiplier as a ratio of (1) a product of the panel duplication reach and the did-not-view reach and (2) a product of a television panel reach and a digital panel reach; determine a duplication factor for a media item based on a television audience reach, a digital audience reach, and the overlap multiplier; and determine a total audience for the media item based on the television audience reach, the digital audience reach, and the duplication factor.

Abstract: Disclosed is a compact integrated apparatus of an interferometric radar altimeter (IRA) and a radar altimeter (RA) capable of performing individual missions by altitude, which includes: a plurality of antennas; a signal processing control unit selecting an RA mode at a low altitude and selecting an IRA mode at a high altitude based on a mode threshold and selecting an FMCW waveform at the low altitude and selecting an FM pulse waveform at the high altitude based on a waveform threshold; and a transceiving unit transmitting a signal by a first antenna positioned at an outermost portion among the plurality of antennas and receiving a signal by an nth antenna positioned at another outermost portion among the plurality of antennas in the RA mode and transmitting a signal through the first antenna and receiving signals through the plurality of antennas in the IRA mode.

Abstract: The present disclosure discloses an apparatus for estimating temperature of at least one secondary battery in a battery pack including at least one secondary battery. The battery temperature estimation apparatus according to the present disclosure is an apparatus for estimating temperature of at least one secondary battery in a battery pack including at least one secondary battery, and includes a board temperature measuring unit provided on an integrated circuit board provided in the battery pack to measure a temperature of the integrated circuit board, and a calculating unit which calculates a temperature of the secondary battery using the temperature of the integrated circuit board measured by the board temperature measuring unit and an ambient temperature of the battery pack.

Abstract: Disclosed is a speaker driver from which surrounding (suspension) has been omitted, including a magnet unit disposed in a set form, a vibration unit disposed adjacent to the magnet unit and generating a sound through vibration, and a winding unit disposed between the magnet unit and the vibration unit in a winding shape, generating magnetism in a first direction or a second direction which is a direction opposite to the first direction when power is applied to the winding unit, and vibrating the vibration unit by applying, to the vibration unit, a force generated in association with magnetism of the magnet unit.

Abstract: A memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. The memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.

Abstract: A memory device includes a driver that drives a data line connected with an external device, an internal ZQ manager that generates an internal ZQ start signal, a selector that selects one of the internal ZQ start signal and a ZQ start command from the external device, based on a ZQ mode, a ZQ calibration engine that generates a ZQ code by performing ZQ calibration in response to a selection result of the selector, and a ZQ code register that loads the ZQ code onto the driver in response to a ZQ calibration command from the external device.

Abstract: Disclosed is a compact integrated apparatus of an interferometric radar altimeter (IRA) and a radar altimeter (RA) capable of performing individual missions by altitude, which includes: a plurality of antennas; a signal processing control unit selecting an RA mode at a low altitude and selecting an IRA mode at a high altitude based on a mode threshold and selecting an FMCW waveform at the low altitude and selecting an FM pulse waveform at the high altitude based on a waveform threshold; and a transceiving unit transmitting a signal by a first antenna positioned at an outermost portion among the plurality of antennas and receiving a signal by an nth antenna positioned at another outermost portion among the plurality of antennas in the RA mode and transmitting a signal through the first antenna and receiving signals through the plurality of antennas in the IRA mode.

Abstract: Disclosed is a method of measuring protein kinase activity, including a) attaching GMBS (N-[?-maleimidobutyryloxy]sulfosuccinimide ester) to a base plate, b) attaching a substrate that reacts with a protein kinase to the base plate having GMBS attached thereto, thus manufacturing a kit for measuring protein kinase activity, c) introducing, to the kit, a mixture of a sample to be analyzed and a buffer including triton X-100, and d) probing phosphorylation of the substrate caused by the protein kinase contained in the sample, thereby measuring the activity of the protein kinase.

Abstract: A method of controlling on-die termination (ODT) in a multi-rank system including a plurality of memory ranks is provided. The method includes: enabling ODT circuits of the plurality of memory ranks into an initial state when the multi-rank system is powered on; enabling the ODT circuits of a write target memory rank and non-target memory ranks among the plurality of memory ranks during a write operation; and disabling the ODT circuit of a read target memory rank among the plurality of memory ranks while enabling the ODT circuits of non-target memory ranks among the plurality of memory ranks during a read operation.

Abstract: A memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. The memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.

Abstract: Example methods and apparatus disclosed herein include campaign mapping for total audience measurement. An example apparatus includes processor circuitry to train a machine learning model to determine first and second estimated duplication factors for respective first and second reference media campaigns; and determine, using the machine learning model, third estimated duplication factors for a query media campaign based on total exposure metrics associated with individual ones of media platforms for the query media campaign. The processor circuitry to select one of the first and second reference media campaigns based on a comparison of the third estimated duplication factors with each of the first and second estimated duplication factors; and determine fourth estimated duplication factors for the query media campaign based on (a) the respective first or second estimated duplication factors associated with the selected one of the first and second reference media campaigns and (b) the total exposure metrics.

Abstract: A memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. The memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to rectify false set top box tuning data. Disclosed examples methods include identifying, by executing an instruction with a processor, in the return path data, first tuning data corresponding to a first group of set top boxes, the first group of set top boxes classified as associated with machine events, determining, by executing an instruction with a processor, a ratio between first tuning events in the return path data and second tuning events in the return path data, the first tuning events attributed to the first group of the set top boxes, the second tuning events attributed to a second group of the set top boxes classified at not associated with machine events, and in response to the ratio satisfying a threshold during a time interval, removing second tuning data associated with the time interval from the first tuning data.

Abstract: Proposed is a high temperature superconducting wire manufacturing method and a high temperature superconducting wire having multiple superconducting layers formed by applying the method. The method includes a stacking process in which a pair of protective layers of superconducting wires including a substrate, a superconducting layer, and the protective layer are stacked such that the protective layers face each other, a joining process in which the protective layers facing each other are diffusion joining together by thermal treatment and become a joining protective layer, an exfoliating process in which a layered structure of an upper portion of the corresponding superconducting layer is removed such that one side of the superconducting layer is exposed to the outside, and an outermost protective layer forming process in which an outer protective layer formed of the same material as the joining protective layer is formed on the upper portion of the exposed superconducting layer.