Abstract: A thin-film transistor (“TFT”) substrate includes; a substrate including both a light-transmitting region and a light-blocking region, a solar cell pattern disposed on the light-blocking region of the substrate, and comprising at least one solar cell, an insulation layer disposed on the solar cell pattern, and a TFT disposed on the insulation layer.

Abstract: In an organic thin film transistor display substrate, a thin film transistor and a pixel electrode electrically connected to the thin film transistor are formed on an array substrate in which a plurality of pixel areas is defined. Also, color filters are formed in the pixel areas. Each color filter is provided with an opening formed therethrough and an active pattern of thin film transistor is received into the opening. Since the active pattern is formed on the array substrate through an inkjet method, the color filter may receive the active pattern therein in lieu of a bank pattern, thereby simplifying the structure of the organic thin film transistor display substrate and improving its productivity.

Abstract: An organic thin film transistor array panel includes a substrate, a gate line formed on the substrate and including a gate electrode. A gate insulating layer is formed on the gate electrode and a data line is formed on the gate insulating layer, intersecting the gate line, and including a drain electrode. A source electrode is formed on the gate insulating layer and is spaced apart from the drain electrode, enclosed by the drain electrode. A bank insulating layer includes a first opening exposing the drain electrode and the source electrode and a second opening which exposes at least a portion of the source electrode. An organic semiconductor is formed in the first opening and contacts the drain electrode and the source electrode. A pixel electrode contacts the source electrode through the second opening.

Abstract: A method for removing noise of a gate signal that is outputted from a gate driving circuit including a plurality of stages, the method includes electrically connecting two terminals of two adjacent stages that have noise components opposite in phase to each other during a first period, and electrically disconnecting the two terminals of the two adjacent stages that have the noise components opposite in phase to each other during a second period.

Abstract: A display substrate having a fan-out and a method for manufacturing the display substrate are disclosed. The fan-out includes an insulating substrate, a first line, a second line, a resistance control pattern, and first and second detour pattern. The first line is disposed on the insulating substrate and is connected to a pad. The second line is formed from the same layer as the first line and is connected to a thin-film transistor (TFT). The resistance control pattern is formed from a different layer than the first and second lines. The first and second detour patterns are formed from a different layer than the first and second lines and the resistance control pattern, and connect the first and second lines with the resistance control pattern, respectively.

Abstract: A thin film transistors (TFTs) substrate is structured to maintain as constant across the area of the substrate a kickback voltage due to Miller capacitance between the drain and gate of each TFT even in the presence of manufacturing induced misalignments between the drain electrodes and corresponding gate lines. Each thin film transistor includes a gate electrode, an active layer formed on the gate electrode so as to overlap the gate electrode, first and second source electrodes respectively connected to first and second data lines each of which crosses the gate line while being insulated from the gate line, and an elongated drain electrode located between the first and second source electrodes and disposed over the gate electrode so as to a crossing length of the drain electrode is larger than an underlying width of the gate electrode such that misalignment induced shifts of the position of the gate electrode relative to the drain electrode does not substantially change overlap area between the two.

Abstract: A touch screen display device includes a common electrode, a base substrate disposed opposite to the common electrode, a display signal line formed on the base substrate, a plurality of pixel electrodes, a touch position sensing part formed between the base substrate and the pixel electrodes, the touch position sensing part sensing a change of electrostatic capacitance formed between the common electrode and the touch position sensing part, and a display layer disposed between the common electrode and the pixel electrodes. The display layer includes a plurality of micro capsules comprising positively charged pigment particles and negatively charged pigment particles.

Abstract: A thin-film transistor (TFT) substrate includes a gate electrode, a gate insulation pattern, a channel pattern, a first organic insulation pattern, a source electrode and a drain electrode. The gate electrode is formed on a base substrate. The gate insulation pattern is formed on the gate electrode and is smaller than the gate electrode. The channel pattern is formed on the gate insulation pattern and the channel pattern is smaller than the gate electrode. The first organic insulation pattern is formed on the base substrate to cover the channel pattern, the gate insulation pattern and the gate electrode.

Abstract: A method of manufacturing a thin film transistor (“TFT”) array panel includes forming a first conductive layer, gate insulating layer, and first insulating layer on a substrate, patterning the first insulating layer to form a first insulating pattern including an opening, etching the gate insulating layer and first conductive layer to form a gate insulating member and a gate line, forming an organic semiconductor in the opening, forming a passivation layer and a second insulating pattern thereon, patterning the second insulating layer to form a second insulating pattern, etching the passivation layer, depositing a second conductive layer thereon, forming a pixel electrode by removing the second insulating pattern and the second conductive layer deposited on the second insulating pattern, and forming a drain electrode and a data line by depositing and patterning a third conductive layer on the resultant structure.

Abstract: A mask is provided. The mask includes a mask body, a first exposing part and a second exposing part. The first exposing part is on the mask body. The first exposing part includes a first light transmitting portion and second light transmitting portions. The first light transmitting portion exposes a portion of the photoresist film corresponding to the output terminal to a light of a first light amount. The second light transmitting portions exposes an adjacent portion of the photoresist film adjacent to the output terminal to a light of a second light amount smaller than the first light amount. The second exposing part is on the mask body. The second exposing part includes third light transmitting portions for partially exposing the photoresist film corresponding to the storage electrode to a light of a third light amount that is between the first and second light amounts.