Patents by Inventor Soo-Won Lee
Soo-Won Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12270998Abstract: A display device includes a display unit including a first surface emitting first light, a second surface opposite to the first surface, a first transmission area transmitting light incident on the first surface, and a second transmission area transmitting the light incident on the first surface. The display device includes a first lens on the first surface and including a first hole overlapping the first transmission area in a thickness direction, a second lens on the first surface and spaced apart from the first lens and including a second hole overlapping the second transmission area in the thickness direction, and light sources emitting second light and disposed on the first and second lenses. The display device includes a first camera sensor on the second surface and overlapping the first transmission area, and a second camera sensor on the second surface and overlapping the second transmission area.Type: GrantFiled: October 12, 2021Date of Patent: April 8, 2025Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Cheon Myeong Lee, Sang Ho Kim, Soo Min Baek, Ji Won Lee, Ju Hwa Ha
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Patent number: 12273610Abstract: A display device includes a display portion including a first surface, from which light is emitted in a first direction, and a second surface opposite to the first surface, a first optical portion disposed on the first surface, and a second optical portion disposed on the first surface to be spaced apart from the first optical portion in a second direction crossing the first direction. Each of the first and second optical portions includes a multi-channel lens through which the light from the first surface passes, a first infrared light source, a first camera, and a first lens frame coupled to the multi-channel lens in the first direction to support at least a portion of the multi-channel lens. The first lens frame may include a first recess structure in which the first infrared light source is disposed and a second recess structure in which the first camera is disposed.Type: GrantFiled: July 20, 2023Date of Patent: April 8, 2025Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Ji Won Lee, Sang Ho Kim, Soo Min Baek, Ju Youn Son, Cheon Myeong Lee, Bek Hyun Lim, Ju Hwa Ha
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Publication number: 20250104722Abstract: A method and device for encoding/decoding an audio signal based on dequantization through potential diffusion are provided. The method of decoding an audio signal includes obtaining a discrete latent vector in which a speech signal is quantized and based on the discrete latent vector, outputting a continuous latent vector in which the discrete latent vector is dequantized.Type: ApplicationFiled: September 16, 2024Publication date: March 27, 2025Applicants: Electronics and Telecommunications Research Institute, The Trustees of Indiana UniversityInventors: Inseon JANG, Woo-taek LIM, Soo Young PARK, Seung Kwon BEACK, Jongmo SUNG, Byeongho CHO, Jung Won KANG, Tae Jin LEE, Minje KIM, Haici YANG
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Publication number: 20250104724Abstract: A method and apparatus for encoding/decoding a neural network-based personalized speech are provided. The method includes outputting a first bit stream in which an input speech signal is encrypted, based on the input speech signal, and outputting a second bit stream in which speaker information of the input speech signal is encrypted, based on the input speech signal.Type: ApplicationFiled: September 16, 2024Publication date: March 27, 2025Applicants: Electronics and Telecommunications Research Institute, The Trustees of Indiana UniversityInventors: Inseon JANG, Soo Young PARK, Seung Kwon BEACK, Jongmo SUNG, Woo-taek LIM, Byeongho CHO, Jung Won KANG, Tae Jin LEE, Minje KIM, Haici YANG
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Publication number: 20250105403Abstract: A secondary battery includes an electrode assembly including a positive electrode plate, a negative electrode plate, and a separator disposed between the positive electrode plate and the negative electrode plate, wherein the electrode assembly has a first end, a second end opposite the first end, a first side and a second side opposite the first side, a pouch configured to surround the electrode assembly, and an inner support installed between the pouch and the electrode assembly to support the inside of the pouch.Type: ApplicationFiled: June 6, 2024Publication date: March 27, 2025Inventors: Yoo Jung LEE, Jeong A WON, Su Kyung JIN, Eun Seo JEE, Seung Yoon HONG, Ha Yan LEE, Ji Won PARK, Hyeong Ho CHOI, Do Hyeong SEOK, Soo Bean CHOI
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Publication number: 20250095216Abstract: This disclosure provides a method and apparatus for compressing 3-dimensional volume data. The method for encoding a TSDF volume may comprise: lossily encoding magnitude information of a Truncated Signed Distance Field (TSDF) volume based on a hyperprior model; and losslessly encoding sign information of the TSDF volume based on the hyperprior model, wherein the lossy encoding comprises selecting and entropy-encoding some elements from a latent vector for the TSDF volume based on selection information obtained through the hyperprior model.Type: ApplicationFiled: September 19, 2024Publication date: March 20, 2025Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Soo Woong KIM, Gun BANG, Ji Hoon DO, Seong Jun BAE, Jin Ho LEE, Ha Hyun LEE, Jung Won KANG
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Publication number: 20250079985Abstract: According to embodiments of the disclosure, a DC-DC converter includes a voltage generator configured to generate an output voltage by converting an input voltage, a first mode driver configured to generate a first switching signal to drive the voltage generator in a first mode, a second mode driver configured to generate a second switching signal to drive the voltage generator in a second mode, a third mode driver configured to generate a third switching signal to drive the voltage generator in a third mode, and a mode controller configured to determine an output load of the voltage generator using the first switching signal, the second switching signal, and the third switching signal, and supply one of the first switching signal, the second switching signal, and the third switching signal to the voltage generator according to the output load.Type: ApplicationFiled: June 7, 2024Publication date: March 6, 2025Inventors: Hyo Chul LEE, Franklindon BIEN, Ji Won KIM, Seung In BAEK, In Soo WANG, Woo Jin PARK
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Publication number: 20250063799Abstract: A semiconductor device includes: an active pattern extending in a first direction across an underlying substrate, a gate structure extending in a second direction, on the active pattern, a first source/drain contact electrically connected to a source/drain region within the active pattern, on one side of the gate structure, and a first via pattern electrically connected to an upper surface of the first source/drain contact. A rail pattern is provided, which extends in the first direction, and is spaced apart from the first via pattern in the second direction. A wiring pattern extends in the first direction, and is electrically connected to an upper surface of the rail pattern. The first source/drain contact includes a first recess therein, which is more recessed downwardly relative to the upper surface of the first source/drain contact, and at least a portion of the first recess extends adjacent to the rail pattern.Type: ApplicationFiled: March 28, 2024Publication date: February 20, 2025Inventors: Ju Hun PARK, Jong Hyun PARK, Jong Lae LEE, Jong Sun LEE, Da Un JEON, Hyo Won JEONG, Gyu Eon CHO, Hyo Taek CHOI, Soo Yeon HONG
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Publication number: 20250051640Abstract: A semiconductor nanoparticle, a method of manufacturing the semiconductor nanoparticle, and an electronic device including the nanoparticle are provided. The semiconductor nanoparticle includes silver, indium, gallium, and sulfur, wherein the semiconductor nanoparticle is configured to emit a green light, wherein the semiconductor nanoparticle has a relative mole value of zinc as defined by Equation 1 that is greater than or equal to about 0.25 and less than or equal to about 0.9: Relative ? mole ? value ? of ? zinc = [ Zn ] / ( [ Ag ] + [ In ] + [ Ga ] + [ Zn ] ) Equation ? 1 wherein, in Equation 1, [Ag], [In], [Ga], and [Zn] are molar amounts of the silver, the indium, the gallium, and the zinc in the semiconductor nanoparticle, respectively, and wherein a mole ratio of gallium to indium is greater than about 2.5:1 and less than about 5.6:1.Type: ApplicationFiled: August 8, 2024Publication date: February 13, 2025Inventors: Soo Kyung KWON, Seungrim YANG, A Ra JO, Seon-Yeong KIM, Nayoun WON, Jun Ho LEE, Mi Hye LIM
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Publication number: 20250054224Abstract: The present disclosure relates to a method and apparatus for representing dynamic neural radiance fields from unsynchronized videos. A method of acquiring a video at an arbitrary viewpoint based on a dynamic neural radiance fields model according to an embodiment of the present disclosure may comprise: inputting one or more videos acquired from one or more views for one scene into the dynamic neural radiance fields model; inputting a time embedding for the one or more videos into the dynamic neural radiance fields model; and rendering the video at the arbitrary viewpoint based on color information and density information output by the dynamic neural radiance fields model. Herein, time synchronization related to the time embedding may be performed by applying an individual time offset learned for each view, for the one or more views.Type: ApplicationFiled: August 9, 2024Publication date: February 13, 2025Applicants: Electronics and Telecommunications Research Institute, UIF (University Industry Foundation), Yonsei UniversityInventors: Ha Hyun LEE, Gun Bang, Soo Woong Kim, Ji Hoon Do, Seong Jun Bae, Jin Ho Lee, Jung Won Kang, Young Jung Uh, Seo Ha Kim, Jung Min Bae, Young Sik Yun
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Patent number: 12225175Abstract: An apparatus for creating a virtual world includes a processor and a memory connected to the processor, in which the memory stores program instructions executed by the processor so as to receive an image of a real space through a device having a stereo camera, collect mesh data for the real space and an object existing in the real space through the image, determine coordinates for first edges of the real space from the mesh data for the real space, select one of a plurality of second edges based on an area of a virtual space defined by each of the plurality of second edges facing a predetermined direction, when there are more first edges of the real space than edges of a polygon preset for the real space, and output a virtual space defined by some of the first edges and the selected one second edge and a virtual object corresponding to the real object recognized in the real space.Type: GrantFiled: October 27, 2022Date of Patent: February 11, 2025Assignee: INDUSTRY ACADEMY COOPERATION FOUNDATION OF SEJONG UNIVERSITYInventors: Soo Mi Choi, Jong Won Lee, Ho San Kang
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Publication number: 20250039376Abstract: Disclosed herein are an image encoding/decoding method and apparatus. The image decoding method includes acquiring a partitioning index of a current block from a bitstream, and generating a prediction sample of the current block by weighted-summing a prediction sample of a first subblock of the current block and a prediction sample of a second subblock of the current block based on the partitioning index. The partitioning index indicates a partitioning distance and a partitioning direction included in a predefined table.Type: ApplicationFiled: October 15, 2024Publication date: January 30, 2025Inventors: Jin Ho LEE, Jung Won KANG, Soo Woong KIM, Gun BANG, Ha Hyun LEE, Sung Chang LIM
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Publication number: 20250039367Abstract: The present invention relates to a video decoding method, according to embodiment of the invention, image decoding method comprises, acquiring a reconstructed luma block of a current block, determining whether a cross-component adaptive loop filter is applied to the current block, acquiring a reconstructed chroma block of the current block, to which an adaptive loop filter is applied, when the cross-component adaptive loop filter is applied to the current block and acquiring a final reconstructed chroma block of the current block, to which the cross-component loop filter is applied, using the reconstructed luma block and the reconstructed chroma block, to which the adaptive loop filter is applied.Type: ApplicationFiled: July 29, 2024Publication date: January 30, 2025Inventors: Sung Chang LIM, Jung Won KANG, Soo Woong KIM, Gun BANG, Jin Ho LEE, Ha Hyun LEE
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Publication number: 20240404930Abstract: The present disclosure provides a package structure and a related manufacturing method thereof, wherein a heat dissipation structure surrounding a chip is arranged, and an electrical connection structure is arranged on the outer side of the heat dissipation structure, so that other laminated package components can be electrically connected through a second electrical connection surface of the electrical connection structure to achieve lamination; the heat dissipation structure, the molding layer and the electrical connection structure are fastened through molding the electrical connection structure and the heat dissipation structure by the molding layer, and the molding layer and the electrical connection structure are prevented from warpage by the heat dissipation structure; finally, the package structure has the functions of heat dissipation, lamination and warpage prevention.Type: ApplicationFiled: May 30, 2024Publication date: December 5, 2024Applicant: STATS CHIPPAC SEMICONDUCTOR (JIANGYIN) CO., LTD.Inventors: Jiade Liao, Jian Xu, Soo Won Lee
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Publication number: 20240379701Abstract: A sensor package structure includes: a substrate; a sensor chip, displayed on the substrate and electrically connected to the substrate, where a light-receiving region is displayed on a surface, facing away from the substrate, of the sensor chip; a first package body, covering the substrate and having a chamber therein, where the light-receiving region of the sensor chip is exposed in the first chamber, and the first package body has a first opening, the first opening being in communication with the first chamber and corresponding to the light-receiving region of the sensor chip; a transparent cover plate, displayed within the first opening, where the transparent cover plate includes a first surface facing towards the first chamber and a second surface facing away from the first surface; and a second package body, displayed on the first package body.Type: ApplicationFiled: April 10, 2024Publication date: November 14, 2024Applicant: STATS CHIPPAC SEMICONDUCTOR (JIANGYIN) CO., LTD.Inventors: Jeonghan KIM, Soo Won LEE, Jian XU, Hyoungill MIN, Chuanming TANG
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Publication number: 20240363515Abstract: A semiconductor package structure and a forming method therefor are disclosed. The package structure includes: an encapsulant including a first and a second surfaces that are opposite and peripheral side surfaces, wherein the first surface is provided with protruding connection terminals, and junction between the first surface and the peripheral side surfaces are provided with four top corners; a substrate including a flip-chip area, wherein the flip-chip area is provided with four corner areas corresponding to four top corners of the encapsulant; trenches positioned in the substrate in the corner areas or around the corner areas or in the four corner areas and around the four corner areas at the same time; a high-modulus first underfill layer filling four trenches and spaces between the four trenches and the first surface of the encapsulant; and a low-modulus second underfill layer filling a remaining space between the encapsulant and the substrate.Type: ApplicationFiled: April 26, 2024Publication date: October 31, 2024Applicant: STATS CHIPPAC SEMICONDUCTOR (JIANGYIN) CO., LTD.Inventors: Jeonghan Kim, Soo Won Lee, Jian Xu, Hyoungill Min, Ruifeng Jiang
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Publication number: 20240363601Abstract: The present disclosure discloses a chip package structure and a preparation method thereof. The chip package structure includes: a metal wiring layer; a first chip, wherein a front surface of the first chip is flip-chipped on a first surface of the metal wiring layer; a first molding layer coating the first chip; a second chip, wherein a front surface of the second chip is flip-chipped on a second surface of the metal wiring layer; a first metal pillar formed on the second surface of the metal wiring layer; a second molding layer coating the second chip and the first metal pillar; and a second metal pillar formed on one side that is of the second molding layer and that is far away from the metal wiring layer, wherein the second metal pillar is at least partially connected to the corresponding first metal pillar.Type: ApplicationFiled: April 26, 2024Publication date: October 31, 2024Applicant: STATS CHIPPAC SEMICONDUCTOR (JIANGYIN) CO., LTD.Inventors: Zelong Yu, Huanhuan Yuan, Jian Xu, Soo Won Lee
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Patent number: 10394864Abstract: A method and a server for extracting a topic and evaluating suitability of the extracted topic are disclosed. The topic extraction server includes a text preprocessing unit configured to extract noun from a document group and remove stopword from the extracted noun, a keyword extraction unit configured to calculate a weight of a noun and extracting a keyword representing the document group, a seed selection unit configured to calculate a weight of the extracted keyword and select a seed, an initial clustering unit configured to generate one cluster including the selected seed and a keyword shown by several times in a sentence including the selected seed, and a cluster combination unit configured to extract a topic group.Type: GrantFiled: July 29, 2014Date of Patent: August 27, 2019Assignee: FOUNDATION OF SOONGSIL UNIVERSITY INDUSTRY COOPERATIONInventors: Soo Won Lee, Joon Ho Noh
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Patent number: 10185996Abstract: Provided are a method and a system for predicting stock fluctuation prediction. A system for predicting stock fluctuation according to an embodiment of the present invention includes: a data collector and a preprocessor collecting news and KOSPI data and extracting words from the collected news through stopword removal and morphologic analysis, a sentiment dictionary constructor selecting sentiment words and calculating sentiment values of the sentiment words to construct a sentiment dictionary of a stock domain required for stock prediction, and a stock fluctuation prediction model constructor predicting fluctuation of a closing price of a next day to a closing price of a current day by combining a prediction model using the constructed sentiment dictionary and an ARIMA prediction model using the KOSPI data.Type: GrantFiled: July 15, 2016Date of Patent: January 22, 2019Assignee: FOUNDATION OF SOONGSIL UNIVERSITY INDUSTRY COOPERATIONInventors: Soo Won Lee, Jang Yun Um
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Patent number: 10109587Abstract: An integrated circuit packaging system, and a method of manufacture thereof, including: a substrate including: a first trace layer, an encapsulation on the first trace layer, the first trace layer having a surface exposed from the encapsulation with a rough texture characteristic of removal of a conductive carrier coating, a second trace layer on the encapsulation and over the first trace layer, the second trace layer connected to the first trace layer; and an integrated circuit die attached to the substrate.Type: GrantFiled: August 2, 2016Date of Patent: October 23, 2018Assignee: STATS ChipPAC Pte. Ltd.Inventors: Dao Nguyen Phu Cuong, Bartholomew Liao Chung Foh, Byung Tai Do, Kyung Moon Kim, Jeffrey David Punzalan, SeungYong Chai, Soo Won Lee, Kwok Keung Szeto, KyungOe Kim