Abstract: Disclosed is a wafer level package having a cylindrical capacitor, which is capable of increasing electrostatic capacity thanks to the use of a cylindrical capacitor structure and which includes a wafer chip having a bonding pad formed thereon and an insulating layer formed thereon and exposing the bonding pad, a redistribution layer connected to the bonding pad and extending to one side of the insulating layer, a cylindrical outer electrode connected to the redistribution layer and having a center opening therein, a cylindrical inner electrode formed in the center opening of the outer electrode so as to be separated from the outer electrode, a dielectric layer formed between the outer electrode and the inner electrode, and a resin sealing portion formed on the insulating layer to cover the redistribution layer, the inner electrode, the outer electrode and the dielectric layer and having a first recess for exposing an upper surface of the inner electrode.

Abstract: Disclosed herein is a MEMS device package including a hollow tubular part, a top cap formed to cover a top opening of the tubular part, a bottom cap formed to cover a bottom opening of the tubular part, and a sensor device equipped in a cavity of the tubular part. The MEMS device can use tubular parts having a variety of cross sections and also enhance an impact resistance by inserting a damper into the tubular part.

Abstract: Disclosed herein is a semiconductor package, including: a first heat radiating plate; a second heat radiating plate formed below the first heat radiating plate; a heat radiating lead formed above the first heat radiating plate and having both ends contacted with the second heat radiating plate; an insulating layer formed above the heat radiating lead; at least one power device formed above the insulating layer; and at least one control device formed above the insulating layer.

Abstract: Disclosed herein is a semiconductor chip, including: a first substrate having a concave formed on one surface thereof and an opening formed on a bottom surface of the concave; a second substrate contacting the other surface of the first substrate; and a semiconductor chip mounted in the concave.

Abstract: Disclosed herein is a semiconductor package, including: a first heat radiating plate; a second heat radiating plate formed below the first heat radiating plate; a heat radiating lead formed above the first heat radiating plate and having both ends contacted with the second heat radiating plate; an insulating layer formed above the heat radiating lead; at least one power device formed above the insulating layer; and at least one control device formed above the insulating layer.

Abstract: Disclosed herein are a method of attaching a die using a self-assembling monolayer and a package substrate including a die attached thereto using a self-assembling monolayer. A first self-assembling monolayer formed on a die and a second self-assembling monolayer formed on a substrate are provided with the same hydrophilic or hydrophobic functional group, so that the die is attached to the substrate using an attractive force acting between the first and second self-assembling monolayers. An accuracy of alignment between the die and the substrate can be improved by the simple solution.

Abstract: Disclosed herein is an apparatus and method for inspecting defects in the circuit pattern of a substrate. The apparatus for inspecting defects in a circuit pattern of a substrate includes a pin probe configured to input a voltage while coming into contact with an inspection target circuit pattern of a substrate. A capacitor sensor is provided with a membrane electrode which is opposite a connection circuit pattern to be electrically connected to the inspection target circuit pattern in a non-contact manner, and is configured to detect both capacitance and capacitance variation, generated due to displacement of the membrane electrode attributable to electrostatic attractive force acting from the connection circuit pattern on the membrane electrode. A capacitance measurement unit is connected to the capacitor sensor and is configured to measure capacitance attributable to the displacement of the membrane electrode, which is input from the capacitor sensor.

Abstract: Disclosed is a wafer level package having a cylindrical capacitor, which is capable of increasing electrostatic capacity thanks to the use of a cylindrical capacitor structure and which includes a wafer chip having a bonding pad formed thereon and an insulating layer formed thereon and exposing the bonding pad, a redistribution layer connected to the bonding pad and extending to one side of the insulating layer, a cylindrical outer electrode connected to the redistribution layer and having a center opening therein, a cylindrical inner electrode formed in the center opening of the outer electrode so as to be separated from the outer electrode, a dielectric layer formed between the outer electrode and the inner electrode, and a resin sealing portion formed on the insulating layer to cover the redistribution layer, the inner electrode, the outer electrode and the dielectric layer and having a first recess for exposing an upper surface of the inner electrode.

Abstract: Disclosed herein is a semiconductor chip, including: a first substrate having a concave formed on one surface thereof and an opening formed on a bottom surface of the concave; a second substrate contacting the other surface of the first substrate; and a semiconductor chip mounted in the concave.

Abstract: Disclosed are a semiconductor package and a manufacturing method thereof. The semiconductor package can include a semiconductor substrate, having one surface on which a conductive pad is formed; an insulating layer, being formed on one surface of the semiconductor substrate; a metal post, penetrating through the conductive pad, the semiconductor substrate, and the insulating layer; and an outer-layer circuit, being electrically connected to the metal post. With the present invention, it can become unnecessary to form an additional via for electrically connecting both surfaces of the semiconductor substrate, thereby simplifying the manufacturing process, reducing the manufacturing cost, and improving the coupling reliability.

Abstract: Disclosed is a wafer level package having a cylindrical capacitor, which is capable of increasing electrostatic capacity thanks to the use of a cylindrical capacitor structure and which includes a wafer chip having a bonding pad formed thereon and an insulating layer formed thereon and exposing the bonding pad, a redistribution layer connected to the bonding pad and extending to one side of the insulating layer, a cylindrical outer electrode connected to the redistribution layer and having a center opening therein, a cylindrical inner electrode formed in the center opening of the outer electrode so as to be separated from the outer electrode, a dielectric layer formed between the outer electrode and the inner electrode, and a resin sealing portion formed on the insulating layer to cover the redistribution layer, the inner electrode, the outer electrode and the dielectric layer and having a first recess for exposing an upper surface of the inner electrode.

Abstract: There is provided a radio frequency identification (RFID) tag. The RFID tag includes a base formed of an insulating material, a circuit chip adhered to one surface of the base and including a pad for an electrical connection, and an antenna formed by jetting a conductive material onto the one surface of the base and electrically connected to the pad.

Abstract: A printed circuit board with an electronic component embedded printed circuit board and a manufacturing method thereof are disclosed. According to an embodiment of the present invention, the method of manufacturing a printed circuit board with an embedded electronic component having a groove formed on one surface thereof and an electrode formed inside the groove includes: forming a first circuit pattern on one surface of a first metal layer; pressing the first metal layer against a first insulator; forming a first conductive protrusion by selectively etching the other surface of the first metal layer; and mounting a first electronic component by disposing a conductive adhesive layer such that an electrode of the first electronic component and the first conductive protrusion are electrically connected to each other. Thus, an electronic component without its electrode protruded outward can be mounted easily and reliably and the manufacturing time can be shortened.

Abstract: Disclosed are a semiconductor package and a manufacturing method thereof. The semiconductor package can include a semiconductor substrate, having one surface on which a conductive pad is formed; an insulating layer, being formed on one surface of the semiconductor substrate; a metal post, penetrating through the conductive pad, the semiconductor substrate, and the insulating layer; and an outer-layer circuit, being electrically connected to the metal post. With the present invention, it can become unnecessary to form an additional via for electrically connecting both surfaces of the semiconductor substrate, thereby simplifying the manufacturing process, reducing the manufacturing cost, and improving the coupling reliability.

Abstract: A printed circuit board with an electronic component embedded printed circuit board and a manufacturing method thereof are disclosed. According to an embodiment of the present invention, the method of manufacturing a printed circuit board with an embedded electronic component having a groove formed on one surface thereof and an electrode formed inside the groove includes: forming a first circuit pattern on one surface of a first metal layer; pressing the first metal layer against a first insulator; forming a first conductive protrusion by selectively etching the other surface of the first metal layer; and mounting a first electronic component by disposing a conductive adhesive layer such that an electrode of the first electronic component and the first conductive protrusion are electrically connected to each other. Thus, an electronic component without its electrode protruded outward can be mounted easily and reliably and the manufacturing time can be shortened.

Abstract: Disclosed are a semiconductor package and a manufacturing method thereof. The semiconductor package can include a semiconductor substrate, having one surface on which a conductive pad is formed; an insulating layer, being formed on one surface of the semiconductor substrate; a metal post, penetrating through the conductive pad, the semiconductor substrate, and the insulating layer; and an outer-layer circuit, being electrically connected to the metal post. With the present invention, it can become unnecessary to form an additional via for electrically connecting both surfaces of the semiconductor substrate, thereby simplifying the manufacturing process, reducing the manufacturing cost, and improving the coupling reliability.

Abstract: A printed circuit board with an electronic component embedded printed circuit board and a manufacturing method thereof are disclosed. According to an embodiment of the present invention, the method of manufacturing a printed circuit board with an embedded electronic component having a groove formed on one surface thereof and an electrode formed inside the groove includes: forming a first circuit pattern on one surface of a first metal layer; pressing the first metal layer against a first insulator; forming a first conductive protrusion by selectively etching the other surface of the first metal layer; and mounting a first electronic component by disposing a conductive adhesive layer such that an electrode of the first electronic component and the first conductive protrusion are electrically connected to each other. Thus, an electronic component without its electrode protruded outward can be mounted easily and reliably and the manufacturing time can be shortened.

Abstract: A method of manufacturing an electronic component embedded printed circuit board including: mounting an electronic component on an insulating layer in a fluidal condition so that a part of the electronic component is inserted into the insulating layer and another part of the electronic component is protruded out of a top surface of the insulating layer by pressing the electronic component onto the insulating layer; fixing the electronic component by curing the insulating layer; forming a metallic seed layer on a top surface of the insulating layer including an exposed surface of the electronic component; forming a plating layer on the metallic seed layer; forming via-holes at positions on the insulating layer, which correspond to pads of the electronic component and forming circuit patterns electrically conducted with the pads; and forming a solder resist layer including the via-holes electrically connected to the circuit patterns.

Abstract: A semiconductor chip package and a printed circuit board having an embedded semiconductor chip package are disclosed. The semiconductor chip package may include a semiconductor chip that has at least one chip pad formed on one side, and a capacitor formed on the other side of the semiconductor chip.

Abstract: A display array substrate according to an aspect of the invention may include: a substrate wafer having a plurality of substrates and cutting portions connecting the plurality of substrates to a dummy area, the substrate wafer being diced to provide individual substrates by cutting the cutting portions; and a transparent electrode part coated over one surface of the substrate wafer.