Abstract: Disclosed is a mobile phone that includes a body having a base layer formed on one surface thereof and a dye-sensitized solar cell mounted on one surface of the body to face the base layer and providing electricity to the body. The dye-sensitized solar cell includes a first transparent substrate, a first electrode, a second electrode, a light absorption layer, a catalytic layer, an electrolyte and a second substrate, and the base layer forms a background against a pattern formed by a dye such that the pattern can be identified when viewed from the outside.

Abstract: Disclosed herein is an apparatus and method for inspecting defects in the circuit pattern of a substrate. The apparatus for inspecting defects in a circuit pattern of a substrate includes a pin probe configured to input a voltage while coming into contact with an inspection target circuit pattern of a substrate. A capacitor sensor is provided with a membrane electrode which is opposite a connection circuit pattern to be electrically connected to the inspection target circuit pattern in a non-contact manner, and is configured to detect both capacitance and capacitance variation, generated due to displacement of the membrane electrode attributable to electrostatic attractive force acting from the connection circuit pattern on the membrane electrode. A capacitance measurement unit is connected to the capacitor sensor and is configured to measure capacitance attributable to the displacement of the membrane electrode, which is input from the capacitor sensor.

Abstract: A display array substrate according to an aspect of the invention may include: a substrate wafer having cutting grooves curved inward; and a transparent electrode coated over one surface of the substrate wafer, wherein shock, occurring when cutting the substrate wafer, is prevented from being transmitted to the transparent electrode by cutting the substrate wafer along the cutting grooves having a different height from the transparent electrode.

Abstract: A dye-sensitized solar cell is disclosed. The dye-sensitized solar cell includes a first substrate, being transparent, a first electrode, formed on a rear surface of the first substrate, a second electrode, formed apart from the first electrode, a catalytic layer, formed on a rear surface of the first electrode, a light absorption layer, which is formed on a front surface of the second electrode and includes a dye absorbed into metal oxide such that the dye forms a specific pattern with the metal oxide, an electrolyte, interposed between the first electrode and the second electrode, a base layer, which is formed on a rear surface of the second electrode and forms a background against the pattern formed by the dye such that the pattern can be identified when viewed from the outside, and a second substrate, formed on a rear surface of the base layer.

Abstract: A dye-sensitized solar cell and a mobile device including the same are disclosed. The dye-sensitized solar cell includes a first transparent substrate, which allows sunlight incident to pass through, a second substrate, which is formed apart from the first substrate, and a plurality of cells, which includes a first electrode, a second electrode, a light absorption layer and an electrolyte. Here, the first electrode and the second electrode are interposed between the first substrate and the second substrate, the first electrode is disposed on a rear surface of the first substrate, the second electrode is disposed on a front surface of the second substrate, the light absorption layer is interposed between the first electrode and the second electrode and includes metal oxide and a dye absorbed in the metal oxide, and the electrolyte is interposed between the first electrode and the second electrode.

Abstract: There is provided a radio frequency identification (RFID) tag. The RFID tag includes a base formed of an insulating material, a circuit chip adhered to one surface of the base and including a pad for an electrical connection, and an antenna formed by jetting a conductive material onto the one surface of the base and electrically connected to the pad.

Abstract: A radio frequency identification (RFID) tag includes a circuit chip including a pad for an electrical connection on one surface thereof, a molding part receiving the circuit chip therein while exposing the pad to the outside, and an antenna formed on an outer surface of the molding part, having a predetermined pattern shape and electrically connected to the pad.

Abstract: Disclosed is a wafer level package having a cylindrical capacitor, which is capable of increasing electrostatic capacity thanks to the use of a cylindrical capacitor structure and which includes a wafer chip having a bonding pad formed thereon and an insulating layer formed thereon and exposing the bonding pad, a redistribution layer connected to the bonding pad and extending to one side of the insulating layer, a cylindrical outer electrode connected to the redistribution layer and having a center opening therein, a cylindrical inner electrode formed in the center opening of the outer electrode so as to be separated from the outer electrode, a dielectric layer formed between the outer electrode and the inner electrode, and a resin sealing portion formed on the insulating layer to cover the redistribution layer, the inner electrode, the outer electrode and the dielectric layer and having a first recess for exposing an upper surface of the inner electrode.

Abstract: Disclosed is a laser processing device, which includes a processing beam source configured to irradiate a processing laser towards an object, a measuring beam source configured to irradiate a modulated measuring laser, an irradiator configured to align a path of the measuring laser with a path of the processing laser directed towards the object, a beam receiver configured to receive the measuring laser reflected from the object, an I/Q demodulator configured to calculate a phase difference between the measuring laser irradiated from the measuring beam source and the measuring laser received at the beam receiver, and a data processor configured to calculate a processed length of the object by using the phase difference. The invention can be used to measure the length of a laser-processed portion at the same time as the laser processing itself, so that the laser processing may be performed with improved precision.

Abstract: The present invention provides a capacitor including: a bottom electrode; a first dielectric layer formed on the bottom electrode; a conductive polymer layer formed on the first dielectric layer; a second dielectric layer formed on the conductive polymer layer; and a top electrode formed on the second dielectric layer, and a method of manufacturing the same.

Abstract: Disclosed herein are a method of attaching a die using a self-assembling monolayer and a package substrate including a die attached thereto using a self-assembling monolayer. A first self-assembling monolayer formed on a die and a second self-assembling monolayer formed on a substrate are provided with the same hydrophilic or hydrophobic functional group, so that the die is attached to the substrate using an attractive force acting between the first and second self-assembling monolayers. An accuracy of alignment between the die and the substrate can be improved by the simple solution.

Abstract: Disclosed is a method of manufacturing a printed circuit board. The method can include providing a carrier formed with a release layer, performing a roughening treatment on the release layer such that the release layer has surface roughness, forming a circuit pattern on the release layer, stacking the carrier on an insulating layer such that the circuit pattern is buried in the insulating layer, and separating the release layer and the carrier from the insulating layer and the circuit pattern.

Abstract: A capacitor is disclosed. The capacitor in accordance with an embodiment of the present invention includes a first electrode, a dielectric substance, which is formed on the first electrode, a second electrode, which is formed on the dielectric substance, and a magnetic layer, which is interposed between the dielectric substance and at least one of the first electrode and the second electrode. In accordance with the present embodiment, dielectric loss can be reduced while minimizing the reduction of capacitance of the capacitor.

Abstract: A printed circuit board with an electronic component embedded printed circuit board and a manufacturing method thereof are disclosed. According to an embodiment of the present invention, the method of manufacturing a printed circuit board with an embedded electronic component having a groove formed on one surface thereof and an electrode formed inside the groove includes: forming a first circuit pattern on one surface of a first metal layer; pressing the first metal layer against a first insulator; forming a first conductive protrusion by selectively etching the other surface of the first metal layer; and mounting a first electronic component by disposing a conductive adhesive layer such that an electrode of the first electronic component and the first conductive protrusion are electrically connected to each other. Thus, an electronic component without its electrode protruded outward can be mounted easily and reliably and the manufacturing time can be shortened.

Abstract: Disclosed are a semiconductor package and a manufacturing method thereof. The semiconductor package can include a semiconductor substrate, having one surface on which a conductive pad is formed; an insulating layer, being formed on one surface of the semiconductor substrate; a metal post, penetrating through the conductive pad, the semiconductor substrate, and the insulating layer; and an outer-layer circuit, being electrically connected to the metal post. With the present invention, it can become unnecessary to form an additional via for electrically connecting both surfaces of the semiconductor substrate, thereby simplifying the manufacturing process, reducing the manufacturing cost, and improving the coupling reliability.

Abstract: A semiconductor package and a method of manufacturing the semiconductor package are disclosed. The semiconductor package in accordance with an embodiment of the present invention includes: a substrate, in which a conductive pattern formed on one surface of the substrate; an insulation layer, which is formed on one surface of the substrate, in which a through-hole is formed in the insulation layer such that the conductive pattern is exposed; a metal post, which is formed in the through-hole such that one end of the metal post is in contact with the conductive pattern and the other end of the metal post is protruded from the insulation layer; and a solder bump, which is formed on the other end of the metal post.

Abstract: Disclosed are a printed circuit board and a method for manufacturing the same. The method, which includes forming a relievo pattern corresponding to a first circuit pattern on a thin-film insulating layer stacked on a carrier; stacking and compressing the carrier with the insulator such that one surface of the carrier on which the relievo pattern is formed faces the insulator; transcribing the thin-film insulating layer and the relievo pattern in the insulator; exposing a part of the relievo pattern by opening a part of the thin-film insulating layer; and forming a second circuit pattern by selectively depositing a conductive metal on the thin-film insulating layer, can manufacture a printed circuit board having high-density circuit patterns by forming a double layer circuit patterns, one circuit pattern buried in the insulator and the other circuit pattern formed on the outer layer, without stacking the insulator for forming a multi-layered printed circuit board.

Abstract: An electronic component embedded printed circuit board and a manufacturing method thereof. The electronic component embedded printed circuit board includes an insulating layer forming a core layer; an electronic component inserted to project a part thereof on an upper part of the insulating layer; a metallic seed layer formed on the insulating layer including a projected surface of the electronic component; a plating layer formed on the metallic seed layer; circuit patterns electrically connected to pads of the electronic component through via-holes formed on the insulating layer; and a solder resist layer which is formed on the insulating layer and has solder balls attached onto the via-holes electrically connected to the circuit patterns. In the electronic component embedded printed circuit board, a heat radiation characteristic can be maximized and a thickness of the printed circuit board can be minimized.

Abstract: A semiconductor chip package and a printed circuit board having an embedded semiconductor chip package are disclosed. The semiconductor chip package may include a semiconductor chip that has at least one chip pad formed on one side, and a capacitor formed on the other side of the semiconductor chip.