Abstract: A video encoding system in which pixel data is decomposed into frequency bands prior to encoding. The frequency bands are organized into blocks that are provided to a block-based encoder. The encoded frequency data is packetized and transmitted to a receiving device. On the receiving device, the encoded data is decoded to recover the frequency bands. Wavelet synthesis is then performed on the frequency bands to reconstruct the pixel data for display. The system may encode parts of frames (tiles or slices) using one or more encoders and transmit the encoded parts as they are ready. A pre-filter component may perform a lens warp on the pixel data prior to the wavelet transform.

Abstract: A video encoding system in which pixel data is decomposed into frequency bands prior to encoding. The frequency bands are organized into blocks that are provided to a block-based encoder. The encoded frequency data is packetized and transmitted to a receiving device. On the receiving device, the encoded data is decoded to recover the frequency bands. Wavelet synthesis is then performed on the frequency bands to reconstruct the pixel data for display. The system may encode parts of frames (tiles or slices) using one or more encoders and transmit the encoded parts as they are ready. A pre-filter component may perform a lens warp on the pixel data prior to the wavelet transform.

Abstract: The present disclosure relates to systems and methods of multi-processing core processing of image frames during image encoding. The multiple processing cores may be connected via dedicated interfaces and transfer neighbor data between the processing cores to enable parallel processing of frame data. The multiple processing cores may each process quad-rows of image data for a single frame in parallel to reduce memory usage and mitigate latency in video encoding.

Abstract: A video encoding system in which pixel data is decomposed into frequency bands prior to encoding. The frequency bands are organized into blocks that are provided to a block-based encoder that encodes the blocks and passes the encoded blocks to a wireless interface that packetizes the blocks for transmittal over a wireless connection. The encoder may categorize the encoded frequency bands into multiple priority levels, and may tag each frequency block with metadata indicating the frequency band represented in the block, the priority of the frequency band, and timing information. The wireless interface may then transmit or drop packets according to the priority levels of the encoded frequency blocks in the packets and/or according to the timing information of the frequency blocks in the packets.

Abstract: This disclosure is directed to systems and methods of rate control in multiple pass video encoding. The video encoder may complete multiple encoding passes for slices of an image. Rate control algorithms may be implemented that scale the quantization step size and quantization matrix values depending on the determined size of the image slices. This may enable the size of slices to be adjusted based on size parameters for the image data.

Abstract: This disclosure is directed to systems and methods of data partitioning in image encoding. A video encoder may receive a single stream of video data that includes multiple layers. The video encoder may encode the one or more layers utilizing multiple counters for each component within the layers. The multiple counters may correspond to the header bits, luma bits, and chroma bits within each slice layer. The encoded layers may then be assembled into a single slice before it is sent to a decoder for decoding of image frame.

Abstract: The present disclosure relates to systems and methods of multi-pipe scheduling for image decoding. For example, a bitstream may include compressed slices that are scheduled to each of the multiple decoding pipelines present in the image processing circuitry of an electronic device. The bitstream may include image data that was encoded using variable-length coding. This results in some bits of the image data containing denser and/or sparser syntax elements and result in variable processing times. The scheduling circuitry may be able to monitor each of the multiple decoder pipelines rate of bit consumption and the number of bits initially scheduled to each of the multiple pipelines and the number of bits consumed by each of the multiple pipelines over time so that incoming compressed slices may be scheduled to the pipe that will be able to process the compressed slice the fastest.

Abstract: This disclosure is directed to systems and methods of streaming extensions for video encoding. The streaming extensions may enable the bitstream syntax for layered video data to be modified to reduce overhead for encoding. The bitstream syntax may be modified to enable variable length luma and chroma components, and enable the alignment between the layers and slice to be bit aligned to enable increased granularity in image encoding, and to minimize overhead between different elements within the layers.

Abstract: A video encoding system in which pixel data is decomposed into frequency bands prior to encoding. The frequency bands are organized into blocks that are provided to a block-based encoder that encodes the blocks and passes the encoded blocks to a wireless interface that packetizes the blocks for transmittal over a wireless connection. The encoder may categorize the encoded frequency bands into multiple priority levels, and may tag each frequency block with metadata indicating the frequency band represented in the block, the priority of the frequency band, and timing information. The wireless interface may then transmit or drop packets according to the priority levels of the encoded frequency blocks in the packets and/or according to the timing information of the frequency blocks in the packets.

Abstract: A video encoding system in which pixel data is decomposed into frequency bands prior to encoding. The frequency bands are organized into blocks that are provided to a block-based encoder that encodes the blocks and passes the encoded blocks to a wireless interface that packetizes the blocks for transmittal over a wireless connection. The encoder may categorize the encoded frequency bands into multiple priority levels, and may tag each frequency block with metadata indicating the frequency band represented in the block, the priority of the frequency band, and timing information. The wireless interface may then transmit or drop packets according to the priority levels of the encoded frequency blocks in the packets and/or according to the timing information of the frequency blocks in the packets.

Abstract: A video encoding system in which pixel data is decomposed into frequency bands prior to encoding. The frequency bands are organized into blocks that are provided to a block-based encoder. The encoded frequency data is packetized and transmitted to a receiving device. On the receiving device, the encoded data is decoded to recover the frequency bands. Wavelet synthesis is then performed on the frequency bands to reconstruct the pixel data for display. The system may encode parts of frames (tiles or slices) using one or more encoders and transmit the encoded parts as they are ready. A pre-filter component may perform a lens warp on the pixel data prior to the wavelet transform.

Abstract: One exemplary implementation involves performing operations at an electronic device with one or more processors and a computer-readable storage medium. The device establishes a wireless communication link with a host device. The device receives, from the host device, a left eye frame and a right eye frame via a sequence of left eye frame transmissions and right eye frame transmissions. The device switches data transmissions schemes according to wireless commination link quality or eye gaze tracking. Adjusting transmission format based on transmission quality of the wireless communication link allows the devices to take advantage of greater bandwidth when available to save power. An additional transmission format is based on alternately transmitting left eye and right eye frames for very low bandwidth.

Abstract: Methods are described for encoding and decoding blocks of image data using intra block copying (IBC). A source block for intra block copying is selected from a source region of a current image that is closer to the current block than a threshold, wherein the source region does not include a portion of the current image that is further from the current block than the threshold.

Abstract: An electronic device includes a wireless transceiver configured to receive content primitives via a wireless communication channel. The electronic device also includes control circuitry control circuitry coupled to the wireless transceiver, and configured to perform content provisioning operations based on the received content primitives, wherein the content provisioning operations comprise generating content image data and transmitting the content image data to the wireless communication channel using the wireless transceiver. In response to a bandwidth condition of the wireless communication channel being less than a threshold, the control circuitry is configured to perform adjusted content provisioning operations that decrease an amount of content image data conveyed by the wireless transceiver to the wireless communication channel.

Abstract: In some embodiments, distributed video reorder buffers of a video (e.g. HEVC, H.265) encoder/decoder each include a circular FIFO array of pointers to buffer allocation units, and control logic which assigns allocation units to incoming video data in an order that allocation units are released by outgoing video data. The assignment order allows increased buffer utilization and lower buffer sizes, which is of increased importance for relatively large (e.g. 64×64, 32×32) video blocks, as supported by HEVC encoding/decoding.

Abstract: Systems and methods for improving decoding of encoded image data using parallel multi-bin decoding are provided. In one embodiment, multiple context bins per cycle are decoded for a set of syntax elements, by decoupling and/or retiming particular syntax parsing and/or arithmetic decoding tasks of the decoding process.

Abstract: Methods are described for encoding and decoding blocks of image data using intra block copying (IBC). A source block for intra block copying is selected from a source region of a current image that is closer to the current block than a threshold, wherein the source region does not include a portion of the current image that is further from the current block than the threshold.

Abstract: In some embodiments, a video prediction (reference block) cache includes multiple (e.g. 4) independently-addressable subcaches, each storing a predetermined part of a cache back-end (memory subsystem) word. For example, a 16-byte word received by the cache from memory may be split between four 4-byte subcaches. Each subcache line/block stores the data of a 2-D pixel array. Retrieving a cached prediction may be performed by accessing different subcaches synchronously (on the same clock cycle) to assemble the prediction from parts stored in different subcaches. A cache tag may be defined by a 4-D vector having x-position, y-position, frame ID, and color component (luma/chroma) fields. Using sub-word, independently-addressable subcaches allows increasing the efficiency of cache access and allows addressing memory bandwidth limitations facing emerging video coding standards and applications, which employ relatively large and varied prediction sizes.

Abstract: Systems and methods for improving decoding of encoded image data using parallel multi-bin decoding are provided. In one embodiment, multiple context bins per cycle are decoded for a set of syntax elements, by decoupling and/or retiming particular syntax parsing and/or arithmetic decoding tasks of the decoding process.

Abstract: In some embodiments, a HEVC (High Efficiency Video Coding, MPEG-H Part 2, H.265) video coder (encoder/decoder) transform unit includes nested transform stages, with 8×8 transform computation hardware, e.g. fused quad multiply accumulate (MAC) units and adders, forming part of 16×16 transform computation hardware, which in turn forms part of a 32×32 video transform computation unit. Control logic and multiplexers may be used to reconfigure interconnections between MAC units depending on the size of incoming video blocks. The transform of a 32×32 video block is computed in a fixed number of clock cycles that is independent of whether or how the 32×32 block is partitioned in smaller blocks. A redundant binary format is used until the final stage of operations to increase the speed of computation.