Patents by Inventor Sorin C. Cismas

Sorin C. Cismas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6145073
    Abstract: Pre-designed and verified data-driven hardware cores (intellectual property, functional blocks) are assembled to generate large systems on a single chip. Token transfer between cores is achieved upon synchronous assertion, over dedicated connections, of a one-bit ready signal by the transmitter and a one-bit request signal by the receiver. The ready-request signal handshake is necessary and sufficient for token transfer. There are no combinational paths through the cores, and no latches or master controller are used. The architecture and interface allow a significant simplification in the design and verification of large systems integrated on a single chip.
    Type: Grant
    Filed: October 16, 1998
    Date of Patent: November 7, 2000
    Assignee: Quintessence Architectures, Inc.
    Inventor: Sorin C. Cismas
  • Patent number: 5574661
    Abstract: An apparatus and method for calculation of the inverse discrete cosine transform for image decompression are disclosed. The apparatus may be implemented with approximately 10,000 transistors for MPEG2 main level speed and with less than 10,000 transistors for MPEG1 main level speed.
    Type: Grant
    Filed: July 29, 1994
    Date of Patent: November 12, 1996
    Assignee: CompCore Multimedia, Inc.
    Inventor: Sorin C. Cismas