Abstract: The disclosure in some aspects relates to recombinant adeno-associated viruses having distinct tissue targeting capabilities. In some aspects, the disclosure relates to gene transfer methods using the recombinant adeno-associated viruses. In some aspects, the disclosure relates to isolated AAV capsid proteins and isolated nucleic acids encoding the same.

Abstract: Aspects of the disclosure relate to barcoded chimeric adeno-associated virus (AAV) capsid libraries, chimeric capsids and related recombinant AAVs (rAAVs) identified using the libraries. Specifically, the chimeric AAV capsid libraries comprise a plurality of nucleic adds encoding AAV capsid proteins, wherein each nucleic acid (i) encodes a unique AAV capsid protein having distinct polypeptide regions of greater than six amino acids in length that are derived from at least two different AAV serotypes, and (ii) comprises a unique barcode sequence. Further disclosed are methods of preparing an AAV library and identifying AAV capsids tropic for a target tissue.

Abstract: In a hardware-accelerated computing systems, calls are made from a processor to an accelerator core. The hardware-accelerated computing system includes a processor core having a stack, an accelerator, and an accelerator scheduler. The computing system is configured to process an accelerator command by the processor core issuing an accelerator command to the accelerator scheduler during execution of a task the accelerator scheduler receiving the accelerator command and requesting data from the stack, the processor sending the requested data from the stack to the accelerator scheduler, the accelerator scheduler sending the requested data to the accelerator and sending a write response to the processor, the accelerator processing the accelerator command, and the processor continuing execution of the task. The processor pauses execution of the task upon issuing the accelerator command and resumes execution of the task upon receiving the write response from the accelerator scheduler.

Abstract: Described herein are nanoparticle compositions that can be used to target specific regions of the blood brain barrier (BBB). Such nanoparticle compositions can be used to deliver therapeutics to or across the BBB or to image the BBB or the permeability thereof.

Abstract: Aspects of the disclosure relate to barcoded chimeric adeno-associated virus (AAV) capsid libraries, chimeric capsids and related recombinant AAVs (rAAVs) identified using the libraries. Specifically, the chimeric AAV capsid libraries comprise a plurality of nucleic adds encoding AAV capsid proteins, wherein each nucleic acid (i) encodes a unique AAV capsid protein having distinct polypeptide regions of greater than six amino acids in length that are derived from at least two different AAV serotypes, and (ii) comprises a unique barcode sequence. Further disclosed are methods of preparing an AAV library and identifying AAV capsids tropic for a target tissue.

Abstract: The disclosure relates, in some aspects, to adeno-associated virus capsid proteins isolated from an in vivo library and recombinant adeno-associated viruses (rAAVs) comprising the same. In some aspects, the disclosure relates to isolated nucleic acids encoding AAV capsid proteins isolated from an in vivo library. In some embodiments, rAAVs and compositions described by the disclosure are useful for delivery of one or more transgenes to the muscle-tissue of a subject.

Abstract: A system on chip (SoC) architecture includes an integrated branch and cache hit-miss trace circuit operably coupled to a CPU core, a first trace circuit, and a cache hit-miss trace circuit. Following an occurrence of a cache-fetch instruction: the cache hit-miss trace circuit identifies whether the fetch instruction is a cache-missed instruction, and, in response thereto, sends a cache miss report message that includes a fetch instruction address to the first trace circuit. The first trace circuit is configured to identify whether the fetch instruction is a taken-branch instruction and creates a modified branch trace response message (BTM) that includes the fetch instruction address and sends the modified BTM to a create trace messages circuit. The modified BTM indicates an instruction address of the cache miss.

Abstract: The disclosure relates, in some aspects, to compositions and methods for enhanced delivery of a transgene to the central nervous system (CNS) of a subject. In some embodiments, the transgene is delivered by recombinant AAV (rAAV). In some embodiments, the method of enhancing transgene delivery comprises administering a blood brain barrier (BBB)-crossing molecule (e.g., K16ApoE) and an rAAV comprising a transgene to a subject.

Abstract: A thread management circuit of a processing system stores a thread identifier table and a thread completion table. The thread management circuit receives, from a processor core, a request for execution of a portion of an application by an accelerator circuit. The thread management circuit allocates a thread identifier available in the thread identifier table to the processor core for the execution of the portion by the accelerator circuit. The thread management circuit communicates a response and an acceleration request, both including the allocated thread identifier, to the processor core and the accelerator circuit, respectively. The thread management circuit communicates a thread joining response to the processor core based on a received thread joining request and an indication by the thread completion table that the execution of the portion by the accelerator circuit is complete. The executed portion is integrated with the application based on the thread joining response.

Abstract: Provided herein are methods for determining the innate immunogenicity of a gene therapy agent in an individual. In particular, the methods involve the use of isolated dendritic cells to detect innate immunogenicity to a gene therapy agent. Exemplary gene therapy agents include adeno-associated virus (AAV) vectors, adenovirus vectors, lentivirus vectors, Herpes simplex virus (HSV) vectors or a lipid nanoparticles.

Abstract: Provided herein are methods for enhancing gene therapy in an individual by administering an IRAK modulator (e.g., an IRAK-4 degrader) with the gene therapy to suppress innate immunity to the gene therapy. In some embodiments, the gene therapy uses an adeno-associated virus (AAV) vector, an adenovirus vector, a lentivirus vector, a Herpes simplex virus (HSV) vector or a lipid nanoparticle. Also provided herein are methods for selecting an individual for treatment with an IRAK modulator in combination with a gene therapy agent.

Abstract: Provided herein are methods for enhancing gene therapy in an individual by administering an IRAK degrader with the gene therapy to suppress innate immunity to the gene therapy. In some embodiments, the gene therapy uses an adeno-associated virus (AAV) vector, an adenovirus vector, a lentivirus vector, a Herpes simplex virus (HSV) vector or a lipid nanoparticle. Also provided herein are methods for selecting an individual for treatment with an IRAK degrader in combination with a gene therapy agent.

Abstract: The disclosure relates, in some aspects, to compositions and methods for enhanced delivery of a transgene to the central nervous system (CNS) of a subject. In some embodiments, the transgene is delivered by recombinant AAV (rAAV). In some embodiments, the method of enhancing transgene delivery comprises administering a blood brain barrier (BBB)-crossing molecule (e.g., K16ApoE) and an rAAV comprising a transgene to a subject.

Abstract: The disclosure relates, in some aspects, to adeno-associated virus capsid proteins isolated from an in vivo library and recombinant adeno-associated viruses (rAAVs) comprising the same. In some aspects, the disclosure relates to isolated nucleic acids encoding AAV capsid proteins isolated from an in vivo library. In some embodiments, rAAVs and compositions described by the disclosure are useful for delivery of one or more transgenes to the muscle-tissue of a subject.

Abstract: Systems and methods receive an asset identification and one or more criterion to at least one of a locale, a market, a target, or an experiment and process a graph having a plurality of sub-graphs to define an asset having one or more desired variants. The asset is then published having the one or more desired variants. Multiple entities are represented as a single entity, which can be used for localization of the asset (e.g., image, video, custom data) or pages. By associating one entity (e.g., an image) across all variations of the entity, the needed storage space for the plurality of assets (e.g., images or videos) is reduced.

Abstract: The disclosure relates, in some aspects, to adeno-associated vims capsid proteins isolated from an in vivo library and recombinant adeno-associated viruses (rAAVs) comprising the same. In some aspects, the disclosure relates to isolated nucleic acids encoding AAV capsid proteins isolated from an in vivo library. In some embodiments, rAAVs and compositions described by the disclosure are useful for delivery of one or more transgenes to the muscle-tissue of a subject.

Abstract: A memory controller for a (DRAM) memory processes an (access) command for a target row in the memory, increments a count value for each victim row associated with the target row, and issues a (dummy activate) command for a victim row whose count value reaches a specified threshold. By tracking victim rows instead of target rows, the memory controller can thwart both single-sided and double-sided row-hammer attacks. The memory controller maintains the victim-row addresses and corresponding command counts in a TCAM memory to detect rows that may be prone to row-hammer attacks. If so, then the memory controller issues dummy activate commands to the corresponding memory rows to thwart such row-hammer attacks.

Abstract: A thread management circuit of a processing system stores a thread identifier table and a thread completion table. The thread management circuit receives, from a processor core, a request for execution of a portion of an application by an accelerator circuit. The thread management circuit allocates a thread identifier available in the thread identifier table to the processor core for the execution of the portion by the accelerator circuit. The thread management circuit communicates a response and an acceleration request, both including the allocated thread identifier, to the processor core and the accelerator circuit, respectively. The thread management circuit communicates a thread joining response to the processor core based on a received thread joining request and an indication by the thread completion table that the execution of the portion by the accelerator circuit is complete. The executed portion is integrated with the application based on the thread joining response.

Abstract: A technique for operating a system including a plurality of processors and a shared resource includes executing a first instruction by a first processor of the plurality of processors. The first instruction generates a reservation of the shared resource for the first processor. The technique includes, after generating the reservation of the shared resource for the first processor, executing a spin lock by the first processor until successful execution of a second instruction acquires a lock of the shared resource. The technique includes disabling interrupts of the first processor in response to an indicator of the successful execution of the second instruction. The first instruction may be a load and reserve instruction and the second instruction may be a conditional store instruction.

Abstract: In a hardware-accelerated computing systems, calls are made from a processor to an accelerator core. The hardware-accelerated computing system includes a processor core having a stack, an accelerator, and an accelerator scheduler. The computing system is configured to process an accelerator command by the processor core issuing an accelerator command to the accelerator scheduler during execution of a task the accelerator scheduler receiving the accelerator command and requesting data from the stack, the processor sending the requested data from the stack to the accelerator scheduler, the accelerator scheduler sending the requested data to the accelerator and sending a write response to the processor, the accelerator processing the accelerator command, and the processor continuing execution of the task. The processor pauses execution of the task upon issuing the accelerator command and resumes execution of the task upon receiving the write response from the accelerator scheduler.