Patents by Inventor Sreenivas Krishnan

Sreenivas Krishnan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11907150
    Abstract: A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: February 20, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Fred Worley, Harry Rogers, Sreenivas Krishnan, Zhan Ping, Michael Scriber
  • Publication number: 20210263871
    Abstract: A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.
    Type: Application
    Filed: May 10, 2021
    Publication date: August 26, 2021
    Inventors: Fred Worley, Harry Rogers, Sreenivas Krishnan, Zhan Ping, Michael Scriber
  • Patent number: 11003609
    Abstract: A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: May 11, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Fred Worley, Harry Rogers, Sreenivas Krishnan, Zhan Ping, Michael Scriber
  • Patent number: 10929325
    Abstract: A method of operating a computer network system configured with disaggregated inputs/outputs. This system can be configured in a leaf-spine architecture and include a router coupled to a network source, a plurality of core switches coupled to the router, a plurality of aggregator switches coupled to each of the plurality of core switches, and a plurality of rack modules coupled to each of the plurality of aggregator switches. Each of rack modules can include an I/O appliance with a downstream aggregator module, a plurality of server devices each with PCIe interfaces, and an upstream aggregator module that aggregates each of the PCIe interfaces. A high-speed link can be configured between the downstream and upstream aggregator modules via aggregation of many serial lanes to provide reliable high speed bit stream transport over long distances, which allows for better utilization of resources and scalability of memory capacity independent of the server count.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: February 23, 2021
    Assignee: INPHI CORPORATION
    Inventors: Sreenivas Krishnan, Nirmal Raj Saxena
  • Publication number: 20200379933
    Abstract: A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.
    Type: Application
    Filed: August 14, 2020
    Publication date: December 3, 2020
    Inventors: Fred Worley, Harry Rogers, Sreenivas Krishnan, Zhan Ping, Michael Scriber
  • Patent number: 10776299
    Abstract: A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: September 15, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Fred Worley, Harry Rogers, Sreenivas Krishnan, Zhan Ping, Michael Scriber
  • Patent number: 10649667
    Abstract: A system and method for managing garbage collection in Solid State Drives (SSDs) in a Redundant Array of Independent Disks (RAID) configuration, using a RAID controller is described. A control logic can control read and write requests for the SSDs in the RAID configuration. A selection logic can select an SSD for garbage collection. Setup logic can instruct the selected SSD to enter a garbage collection setup phase. An execute logic can instruct the selected SSD to enter and exit the garbage collection execute phase.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: May 12, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Oscar Pinto, Sreenivas Krishnan
  • Publication number: 20200142852
    Abstract: A method of operating a computer network system configured with disaggregated inputs/outputs. This system can be configured in a leaf-spine architecture and include a router coupled to a network source, a plurality of core switches coupled to the router, a plurality of aggregator switches coupled to each of the plurality of core switches, and a plurality of rack modules coupled to each of the plurality of aggregator switches. Each of rack modules can include an I/O appliance with a downstream aggregator module, a plurality of server devices each with PCIe interfaces, and an upstream aggregator module that aggregates each of the PCIe interfaces. A high-speed link can be configured between the downstream and upstream aggregator modules via aggregation of many serial lanes to provide reliable high speed bit stream transport over long distances, which allows for better utilization of resources and scalability of memory capacity independent of the server count.
    Type: Application
    Filed: January 9, 2020
    Publication date: May 7, 2020
    Inventors: Sreenivas KRISHNAN, Nirmal Raj SAXENA
  • Patent number: 10572425
    Abstract: A method of operating a computer network system configured with disaggregated inputs/outputs. This system can be configured in a leaf-spine architecture and include a router coupled to a network source, a plurality of core switches coupled to the router, a plurality of aggregator switches coupled to each of the plurality of core switches, and a plurality of rack modules coupled to each of the plurality of aggregator switches. Each of rack modules can include an I/O appliance with a downstream aggregator module, a plurality of server devices each with PCIe interfaces, and an upstream aggregator module that aggregates each of the PCIe interfaces. A high-speed link can be configured between the downstream and upstream aggregator modules via aggregation of many serial lanes to provide reliable high speed bit stream transport over long distances, which allows for better utilization of resources and scalability of memory capacity independent of the server count.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: February 25, 2020
    Assignee: INPHI CORPORATION
    Inventors: Sreenivas Krishnan, Nirmal Raj Saxena
  • Publication number: 20190286595
    Abstract: A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard.
    Type: Application
    Filed: June 6, 2019
    Publication date: September 19, 2019
    Inventors: Fred Worley, Harry Rogers, Sreenivas Krishnan, Zhan Ping, Michael Scriber
  • Patent number: 10360166
    Abstract: A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: July 23, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Fred Worley, Harry Rogers, Sreenivas Krishnan, Zhan Ping, Michael Scriber
  • Publication number: 20190171605
    Abstract: A method of operating a computer network system configured with disaggregated inputs/outputs. This system can be configured in a leaf-spine architecture and include a router coupled to a network source, a plurality of core switches coupled to the router, a plurality of aggregator switches coupled to each of the plurality of core switches, and a plurality of rack modules coupled to each of the plurality of aggregator switches. Each of rack modules can include an I/O appliance with a downstream aggregator module, a plurality of server devices each with PCIe interfaces, and an upstream aggregator module that aggregates each of the PCIe interfaces. A high-speed link can be configured between the downstream and upstream aggregator modules via aggregation of many serial lanes to provide reliable high speed bit stream transport over long distances, which allows for better utilization of resources and scalability of memory capacity independent of the server count.
    Type: Application
    Filed: February 5, 2019
    Publication date: June 6, 2019
    Inventors: Sreenivas KRISHNAN, Nirmal Raj SAXENA
  • Patent number: 10235318
    Abstract: A method of operating a computer network system configured with disaggregated inputs/outputs. This system can be configured in a leaf-spine architecture and include a router coupled to a network source, a plurality of core switches coupled to the router, a plurality of aggregator switches coupled to each of the plurality of core switches, and a plurality of rack modules coupled to each of the plurality of aggregator switches. Each of rack modules can include an I/O appliance with a downstream aggregator module, a plurality of server devices each with PCIe interfaces, and an upstream aggregator module that aggregates each of the PCIe interfaces. A high-speed link can be configured between the downstream and upstream aggregator modules via aggregation of many serial lanes to provide reliable high speed bit stream transport over long distances, which allows for better utilization of resources and scalability of memory capacity independent of the server count.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: March 19, 2019
    Assignee: INPHI CORPORATION
    Inventors: Sreenivas Krishnan, Nirmal Raj Saxena
  • Publication number: 20180329844
    Abstract: A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.
    Type: Application
    Filed: June 29, 2018
    Publication date: November 15, 2018
    Inventors: Fred Worley, Harry Rogers, Sreenivas Krishnan, Zhan Ping, Michael Scriber
  • Patent number: 10114778
    Abstract: A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: October 30, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Fred Worley, Harry Rogers, Sreenivas Krishnan, Zhan Ping, Michael Scriber
  • Patent number: 10002586
    Abstract: Display data used in display frame generation are compressed for efficient storage in a local memory within a graphics processing unit. The compression technique used is difference encoding and before performing difference encoding, display data in RGB format are converted into YCbCr format. Since the component values of adjacent pixels in YCbCr format typically vary less than the component values of the same adjacent pixels in RGB format, converting the display data to YCbCr format before performing difference encoding improves the compression efficiency.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: June 19, 2018
    Assignee: NVIDIA CORPORATION
    Inventors: Sreenivas Krishnan, Koen Bennebroek, Karthik Bhat, Stefano A. Pescador, David G. Reed, Brad W. Simeral, Edward M. Veeser
  • Publication number: 20180067887
    Abstract: A method of operating a computer network system configured with disaggregated inputs/outputs. This system can be configured in a leaf-spine architecture and include a router coupled to a network source, a plurality of core switches coupled to the router, a plurality of aggregator switches coupled to each of the plurality of core switches, and a plurality of rack modules coupled to each of the plurality of aggregator switches. Each of rack modules can include an I/O appliance with a downstream aggregator module, a plurality of server devices each with PCIe interfaces, and an upstream aggregator module that aggregates each of the PCIe interfaces. A high-speed link can be configured between the downstream and upstream aggregator modules via aggregation of many serial lanes to provide reliable high speed bit stream transport over long distances, which allows for better utilization of resources and scalability of memory capacity independent of the server count.
    Type: Application
    Filed: November 14, 2017
    Publication date: March 8, 2018
    Inventors: Sreenivas KRISHNAN, Nirmal Raj SAXENA
  • Publication number: 20180011641
    Abstract: A system and method for managing garbage collection in Solid State Drives (SSDs) in a Redundant Array of Independent Disks (RAID) configuration, using a RAID controller is described. A control logic can control read and write requests for the SSDs in the RAID configuration. A selection logic can select an SSD for garbage collection. Setup logic can instruct the selected SSD to enter a garbage collection setup phase. An execute logic can instruct the selected SSD to enter and exit the garbage collection execute phase.
    Type: Application
    Filed: September 22, 2017
    Publication date: January 11, 2018
    Inventors: Oscar PINTO, Sreenivas KRISHNAN
  • Patent number: 9846669
    Abstract: A computer network system configured with disaggregated inputs/outputs. This system can be configured in a leaf-spine architecture and can include a router coupled to a network source, a plurality of core switches coupled to the router, a plurality of aggregator switches coupled to each of the plurality of core switches, and a plurality of rack modules coupled to each of the plurality of aggregator switches. The plurality of rack modules can each include an I/O appliance with a downstream aggregator module, a plurality of server devices each with PCIe interfaces, and an upstream aggregator module that aggregates each of the PCIe interfaces. A high-speed link can be configured between the downstream and upstream aggregator modules via aggregation of many serial lanes to provide reliable high speed bit stream transport over long distances, which allows for better utilization of resources and scalability of memory capacity independent of the server count.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: December 19, 2017
    Assignee: INPHI CORPORATION
    Inventors: Sreenivas Krishnan, Nirmal Raj Saxena
  • Patent number: 9804787
    Abstract: A system and method for managing garbage collection in Solid State Drives (SSDs) (120-1, 120-2, 120-3, 120-4, 120-5) in a Redundant Array of Independent Disks (RAID) configuration, using a RAID controller (115) is described. A control logic (505) can control read and write requests (805, 810) for the SSDs (120-1, 120-2, 120-3, 120-4, 120-5) in the RAID configuration. A selection logic (515) can select an SSD for garbage collection. Setup logic (520) can instruct the selected SSD to enter a garbage collection setup phase (920). An execute logic (525) can instruct the selected SSD to enter and exit the garbage collection execute phase (925).
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: October 31, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Oscar Pinto, Sreenivas Krishnan