Patents by Inventor Srikant Nekkanty

Srikant Nekkanty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200107463
    Abstract: An interposer and method of providing spatial and arrangement transformation are described. An electronic system has an electronic package, a motherboard and an interposer between the package and the motherboard. The interposer has signal and ground contacts on opposing surfaces that are respectively connected. The contacts opposing the package has a higher signal to ground contact ratio than the contacts opposing the motherboard, as well as different arrangements. Ground shielding vias in the interposer, which are connected to a ground plane, electrically isolate the signals through the interposer. The package may be mounted on a shielded socket such that signal and ground pins are mounted respectively in signal and ground socket mountings, ground shielding vias are between the signal socket mountings, and the ground socket mountings contain plated socket housings.
    Type: Application
    Filed: September 28, 2018
    Publication date: April 2, 2020
    Inventors: Srikant Nekkanty, Zhichao Zhang, Kemal Aygun
  • Patent number: 10541494
    Abstract: Apparatuses, methods and storage medium associated with connectors for coupling to a computer processing unit (CPU) package are disclosed herein. In embodiments, a connector assembly for connection to a computer processing unit (CPU) package may include a connector housing. One or more electrical contacts of the connector housing may be to couple to the CPU package when the connector assembly is engaged with a mating connector assembly. The connector assembly may further include a mounting handle affixed to a top of the connector housing. The mounting handle may include a locking latch that extends from the mounting handle. The locking latch may engage with a notch within the mating connector assembly that, when engaged, the locking latch may provide a force to maintain coupling of the one or more electrical contacts with the CPU package when engaged with the mating connector assembly.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: January 21, 2020
    Assignee: Intel Corporation
    Inventors: Donald T. Tran, Thomas A. Boyd, Yong Wang, Kevin J. Ceurter, Srikant Nekkanty, Russell S. Aoki, FeiFei Cheng
  • Patent number: 10535615
    Abstract: An electronic package that includes a substrate and a die attached to the substrate. The electronic package further includes a stiffener that is attached to the substrate adjacent to the die. The stiffener is formed of a first layer made from one material and a second layer made from a different material.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: January 14, 2020
    Assignee: Intel Corporation
    Inventors: Manish Dubey, Srikant Nekkanty, Rajendra C. Dias, Patrick Nardi
  • Publication number: 20190103349
    Abstract: An apparatus is provided which comprises: a substrate material comprising one or more embedded copper planes, one or more plated through holes through the substrate material, one or more metal contacts, the metal contacts comprising a substantially straight section coupled with adhesive within the one or more plated through holes, and a cantilever spring section extending beyond a first surface of the substrate material, and one or more conductive contacts on a second surface of the substrate material, opposite the first surface, the conductive contacts coupled with the metal contacts. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: September 30, 2017
    Publication date: April 4, 2019
    Applicant: Intel Corporation
    Inventors: Ram VISWANATH, Srikant NEKKANTY
  • Publication number: 20190052016
    Abstract: Apparatuses, methods and storage medium associated with connectors for coupling to a computer processing unit (CPU) package are disclosed herein. In embodiments, a connector assembly for connection to a computer processing unit (CPU) package may include a connector housing. One or more electrical contacts of the connector housing may be to couple to the CPU package when the connector assembly is engaged with a mating connector assembly. The connector assembly may further include a mounting handle affixed to a top of the connector housing. The mounting handle may include a locking latch that extends from the mounting handle. The locking latch may engage with a notch within the mating connector assembly that, when engaged, the locking latch may provide a force to maintain coupling of the one or more electrical contacts with the CPU package when engaged with the mating connector assembly.
    Type: Application
    Filed: March 31, 2016
    Publication date: February 14, 2019
    Inventors: Donald T. TRAN, Thomas A. BOYD, Yong WANG, Kevin J. CEURTER, Srikant NEKKANTY, Russell S. AOKI, FeiFei CHENG
  • Patent number: 10205292
    Abstract: Embodiments of the present disclosure are directed towards socket contact techniques and configurations. In one embodiment, an apparatus may include a socket substrate having a first side and a second side disposed opposite to the first side, an opening formed through the socket substrate, an electrical contact disposed in the opening and configured to route electrical signals between the first side and the second side of the socket substrate, the electrical contact having a cantilever portion that extends beyond the first side, wherein the first side and surfaces of the socket substrate in the opening are plated with a metal. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: February 12, 2019
    Assignee: INTEL CORPORATION
    Inventors: Dhanya Athreya, Gaurav Chawla, Kemal Aygun, Glen P. Gordon, Sarah M. Canny, Jeffory L. Smalley, Srikant Nekkanty, Michael Garcia, Joshua D. Heppner
  • Publication number: 20180277458
    Abstract: Devices and methods include an electronic package having a through-mold interconnect are shown herein. Examples of the electronic package include a package assembly. The package assembly including a substrate having a first substrate surface. The first substrate surface including a conductive layer attached to the first substrate surface. The package assembly includes a die communicatively coupled to the conductive layer and a contact block. The contact block including a first contact surface on one end of the contact block, a second contact surface on an opposing side of the contact block, and a contact block wall extended therebetween. The contact block includes a conductive material. The first contact surface is coupled to the package assembly with a joint extended partially up the contact block wall. The electronic package further includes an overmold covering portions of the substrate, conductive layer, and die. The second contact surface of the contact block is exposed through the overmold.
    Type: Application
    Filed: May 30, 2018
    Publication date: September 27, 2018
    Inventors: Sasha Oster, Srikant Nekkanty, Joshua D. Heppner, Adel A. Elsherbini, Yoshihiro Tomita, Debendra Mallik, Shawna M. Liff, Yoko Sekihara
  • Patent number: 10044115
    Abstract: An apparatus comprises a cable connector including: a first connector body portion including a first plurality of electrical contacts arranged to contact electrical contacts of a first surface of an edge connector substrate; a second connector body portion separate from the first connector body portion and including a second plurality of electrical contacts arranged to oppose the first plurality of electrical contacts of the first connector body portion and to contact electrical contacts of a second surface of the edge connector substrate, wherein the first and second plurality of electrical contacts are electrically coupled to one or more cables; and a joining mechanism configured to join the first connector body portion and the second connector body portion together and to apply a bias force to the edge connector substrate when the edge connector substrate is arranged between the first connector body portion and the second connector body portion.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: August 7, 2018
    Assignee: Intel Corporation
    Inventors: Donald T. Tran, Gregorio Murtagian, Kuang Liu, Srikant Nekkanty, Feroz Mohammad, Karumbu Meyyappan, Hong Xie, Russell S. Aoki, Gaurav Chawla
  • Patent number: 9953909
    Abstract: Embodiments herein may relate to an electronic device that includes a board. The electronic device may include a device physically coupled with the board by an anchoring pin. The electronic device may further include a plurality of ball grid array (BGA) solder joints coupled with the device. For example, the BGA solder joints may electrically and/or communicatively couple one or more pins of the device with the board. The BGA solder joints may have a shape that is different than the anchoring pin. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: April 24, 2018
    Assignee: Intel Corporation
    Inventors: Zuyang Liang, Michael Garcia, Joshua D. Heppner, Srikant Nekkanty
  • Publication number: 20180033741
    Abstract: An electronic package that includes a substrate and a die attached to the substrate. The electronic package further includes a stiffener that is attached to the substrate adjacent to the die. The stiffener is formed of a first layer made from one material and a second layer made from a different material.
    Type: Application
    Filed: February 12, 2016
    Publication date: February 1, 2018
    Inventors: Manish Dubey, Srikant Nekkanty, Rajendra C. Dias, Patrick Nardi
  • Publication number: 20180019193
    Abstract: Embodiments herein may relate to an electronic device that includes a board. The electronic device may include a device physically coupled with the board by an anchoring pin. The electronic device may further include a plurality of ball grid array (BGA) solder joints coupled with the device. For example, the BGA solder joints may electrically and/or communicatively couple one or more pins of the device with the board. The BGA solder joints may have a shape that is different than the anchoring pin. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: July 18, 2016
    Publication date: January 18, 2018
    Inventors: Zuyang Liang, Michael Garcia, Joshua D. Heppner, Srikant Nekkanty
  • Publication number: 20180019558
    Abstract: Embodiments of the present disclosure are directed towards socket contact techniques and configurations. In one embodiment, an apparatus may include a socket substrate having a first side and a second side disposed opposite to the first side, an opening formed through the socket substrate, an electrical contact disposed in the opening and configured to route electrical signals between the first side and the second side of the socket substrate, the electrical contact having a cantilever portion that extends beyond the first side, wherein the first side and surfaces of the socket substrate in the opening are plated with a metal. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 26, 2017
    Publication date: January 18, 2018
    Inventors: Dhanya Athreya, Gaurav Chawla, Kemal Aygun, Glen P. Gordon, Sarah M. Canny, Jeffory L. Smalley, Srikant Nekkanty, Michael Garcia, Joshua D. Heppner
  • Patent number: 9780510
    Abstract: Embodiments of the present disclosure are directed towards socket contact techniques and configurations. In one embodiment, an apparatus may include a socket substrate having a first side and a second side disposed opposite to the first side, an opening formed through the socket substrate, an electrical contact disposed in the opening and configured to route electrical signals between the first side and the second side of the socket substrate, the electrical contact having a cantilever portion that extends beyond the first side, wherein the first side and surfaces of the socket substrate in the opening are plated with a metal. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: October 3, 2017
    Assignee: INTEL CORPORATION
    Inventors: Dhanya Athreya, Gaurav Chawla, Kemal Aygun, Glen P. Gordon, Sarah M. Canny, Jeffory L. Smalley, Srikant Nekkanty, Michael Garcia, Joshua D. Heppner
  • Publication number: 20170187147
    Abstract: An apparatus comprises a cable connector including: a first connector body portion including a first plurality of electrical contacts arranged to contact electrical contacts of a first surface of an edge connector substrate; a second connector body portion separate from the first connector body portion and including a second plurality of electrical contacts arranged to oppose the first plurality of electrical contacts of the first connector body portion and to contact electrical contacts of a second surface of the edge connector substrate, wherein the first and second plurality of electrical contacts are electrically coupled to one or more cables; and a joining mechanism configured to join the first connector body portion and the second connector body portion together and to apply a bias force to the edge connector substrate when the edge connector substrate is arranged between the first connector body portion and the second connector body portion.
    Type: Application
    Filed: December 23, 2015
    Publication date: June 29, 2017
    Inventors: Donald T. Tran, Gregorio Murtagian, Kuang Liu, Srikant Nekkanty, Feroz Mohammad, Karumbu Meyyappan, Hong Xie, Russell S. Aoki, Gaurav Chawla
  • Patent number: 9692147
    Abstract: An electronic device connection system includes a first electrical device and a second electrical device. The first electrical device includes a plurality of electrical connectors disposed in, on, or about at least a portion of an exterior surface of the first electrical device. The second electrical device includes a plurality of electrical contacts disposed in, on, or about at least a portion of an exterior surface of the second electrical device. A mechanical compressor exerts a force on at least one of the first electrical device or the second electrical device such that the electrical connections on the first electrical device physically and conductively couple to the electrical contacts on the second electrical device. The device casing may function as the mechanical compressor. The electrical connectors and/or electrical contacts may include injection molded connectors that include a conductive material dispersed in a thermoplastic matrix.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: June 27, 2017
    Assignee: INTEL CORPORATION
    Inventors: Srikant Nekkanty, Donald T. Tran, Gregorio R. Murtagian
  • Publication number: 20170179622
    Abstract: An electronic device connection system includes a first electrical device and a second electrical device. The first electrical device includes a plurality of electrical connectors disposed in, on, or about at least a portion of an exterior surface of the first electrical device. The second electrical device includes a plurality of electrical contacts disposed in, on, or about at least a portion of an exterior surface of the second electrical device. A mechanical compressor exerts a force on at least one of the first electrical device or the second electrical device such that the electrical connections on the first electrical device physically and conductively couple to the electrical contacts on the second electrical device. The device casing may function as the mechanical compressor. The electrical connectors and/or electrical contacts may include injection molded connectors that include a conductive material dispersed in a thermoplastic matrix.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 22, 2017
    Applicant: Intel Corporation
    Inventors: SRIKANT NEKKANTY, DONALD T. TRAN, GREGORIO R. MURTAGIAN
  • Publication number: 20170178990
    Abstract: Devices and methods include an electronic package having a through-mold interconnect are shown herein. Examples of the electronic package include a package assembly. The package assembly including a substrate having a first substrate surface. The first substrate surface including a conductive layer attached to the first substrate surface. The package assembly includes a die communicatively coupled to the conductive layer and a contact block. The contact block including a first contact surface on one end of the contact block, a second contact surface on an opposing side of the contact block, and a contact block wall extended therebetween. The contact block includes a conductive material. The first contact surface is coupled to the package assembly with a joint extended partially up the contact block wall. The electronic package further includes an overmold covering portions of the substrate, conductive layer, and die. The second contact surface of the contact block is exposed through the overmold.
    Type: Application
    Filed: December 17, 2015
    Publication date: June 22, 2017
    Inventors: Sasha Oster, Srikant Nekkanty, Joshua D. Heppner, Adel A. Elsherbini, Yoshihiro Tomita, Debendra Mallik, Shawna M. Liff, Yoko Sekihara
  • Patent number: 9502800
    Abstract: A double-mated edge finger connector that is configured to double the connector density without resorting to a reduction in pitch. A first connector defines a first slot configured to receive and permit horizontal displacement of an edge finger of a second board relative thereto, while a second connector defines a second slot configured to receive and permit horizontal displacement of an edge finger of a first board relative thereto, to thereby establish an electrical connection between the first board and the second board.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: November 22, 2016
    Assignee: Intel Corporation
    Inventors: Donald T. Tran, Srikant Nekkanty, Rajasekaran Swaminathan
  • Patent number: 9491881
    Abstract: A microelectronic socket having a two piece construction, wherein a first piece comprises a conductive socket substrate and the second piece comprises an insulative insert. The conductive socket substrate has a first surface, a second surface, and at least one opening extending therebetween. The insulative insert has a base portion with at least one projection extending therefrom. The insulative insert is mated with the conductive socket substrate such that the at least one projection resides within a corresponding conductive socket substrate opening. The insulative insert further includes a plurality of vias, wherein at least one of the plurality of vias extends through the insulative base and through an insulative insert projection, wherein a contact may be disposed within the via.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: November 8, 2016
    Assignee: Intel Corporation
    Inventors: Joshua D. Heppner, Zhichao Zhang, Srikant Nekkanty, Michael Garcia
  • Publication number: 20160254629
    Abstract: Embodiments of the present disclosure are directed towards socket contact techniques and configurations. In one embodiment, an apparatus may include a socket substrate having a first side and a second side disposed opposite to the first side, an opening formed through the socket substrate, an electrical contact disposed in the opening and configured to route electrical signals between the first side and the second side of the socket substrate, the electrical contact having a cantilever portion that extends beyond the first side, wherein the first side and surfaces of the socket substrate in the opening are plated with a metal. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 26, 2014
    Publication date: September 1, 2016
    Applicant: Intel Corporation
    Inventors: Dhanya Athreya, Gaurav Chawla, Kemal Aygun, Glen P. Gordon, Sarah M. Canny, Jeffory L. Smalley, Srikant Nekkanty, Michael Garcia, Joshua D. Heppner