Abstract: A method of manufacturing a semiconductor structure includes forming a stack of alternating layers comprising insulating layers and spacer material layers over a semiconductor substrate, forming a memory opening through the stack, forming an aluminum oxide layer having a horizontal portion at a bottom of the memory opening and a vertical portion at least over a sidewall of the memory opening, where the horizontal portion differs from the vertical portion by at least one of structure or composition, and selectively etching the horizontal portion selective to the vertical portion.

Abstract: A method of manufacturing a semiconductor structure includes forming a stack of alternating layers comprising insulating layers and spacer material layers over a semiconductor substrate, forming a memory opening through the stack, forming an aluminum oxide layer having a horizontal portion at a bottom of the memory opening and a vertical portion at least over a sidewall of the memory opening, where the horizontal portion differs from the vertical portion by at least one of structure or composition, and selectively etching the horizontal portion selective to the vertical portion.

Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices). Methods for protecting nanostructures from fusion during high temperature processing also are provided.

Abstract: An electrode is provided for an electrochemical lithium battery cell. The electrode includes a bulk material that has a plurality of voids dispersed substantially throughout the bulk material. The bulk material is silicon. Numerous other aspects are provided.

Abstract: A method of assembling a turbine engine is provided. The method includes providing a heat exchanger having a curvilinear body. The method also includes coupling the heat exchanger to at least one of a fan casing and an engine casing of the turbine engine. The curvilinear body facilitates reducing pressure losses in airflow channeled into the heat exchanger.

Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices). Methods for protecting nanostructures from fusion during high temperature processing also are provided.

Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices). Methods for protecting nanostructures from fusion during high temperature processing are also provided.

Abstract: The invention provides a method for diagnosing amyotrophic lateral sclerosis (ALS) in a subject, a method for assessing the effectiveness of a drug in treating ALS, and a method for determining the site of onset of ALS in a subject. Each method comprises (a) obtaining a sample from the subject, (b) analyzing the proteins in the sample by mass spectroscopy, and (c) determining a mass spectral profile for the sample. In some embodiments, the method comprises comparing the mass spectral profile of the sample to the mass spectral profile of a positive or a negative standard.

Abstract: Methods for producing electronic grade metal nanostructures having low levels of contaminants are provided. Monolayer arrays, populations, and devices including such electronic grade nanostructures are described. In addition, novel methods and compositions for production of Group 10 metal nanostructures and for production of ruthenium nanostructures are provided, along with methods for recovering nanostructures from suspension.

Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices). Methods for protecting nanostructures from fusion during high temperature processing are also provided.

Abstract: Methods for producing electronic grade metal nanostructures having low levels of contaminants are provided. Monolayer arrays, populations, and devices including such electronic grade nanostructures are described. In addition, novel methods and compositions for production of Group 10 metal nanostructures and for production of ruthenium nanostructures are provided, along with methods for recovering nanostructures from suspension.

Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices). Methods for protecting nanostructures from fusion during high temperature processing are also provided.

Abstract: Methods for producing electronic grade metal nanostructures having low levels of contaminants are provided. Monolayer arrays, populations, and devices including such electronic grade nanostructures are described. In addition, novel methods and compositions for production of Group 10 metal nanostructures and for production of ruthenium nanostructures are provided, along with methods for recovering nanostructures from suspension.

Abstract: The invention provides a method for diagnosing amyotrophic lateral sclerosis (ALS) in a subject, a method for assessing the effectiveness of a drug in treating ALS, and a method for determining the site of onset of ALS in a subject. Each method comprises (a) obtaining a sample from the subject, (b) analyzing the proteins in the sample by mass spectroscopy, and (c) determining a mass spectral profile for the sample. In some embodiments, the method comprises comparing the mass spectral profile of the sample to the mass spectral profile of a positive or a negative standard.

Abstract: The invention provides a method for diagnosing amyotrophic lateral sclerosis (ALS) in a subject, a method for assessing the effectiveness of a drug in treating ALS, and a method for determining the site of onset of ALS in a subject. Each method comprises (a) obtaining a sample from the subject, (b) analyzing the proteins in the sample by mass spectroscopy, and (c) determining a mass spectral profile for the sample. In some embodiments, the method comprises comparing the mass spectral profile of the sample to the mass spectral profile of a positive or a negative standard.

Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices). Methods for protecting nanostructures from fusion during high temperature processing are also provided.

Abstract: A method of assembling a turbine engine is provided. The method includes providing a heat exchanger having a curvilinear body. The method also includes coupling the heat exchanger to at least one of a fan casing and an engine casing of the turbine engine. The curvilinear body facilitates reducing pressure losses in airflow channeled into the heat exchanger.

Abstract: Methods and apparatuses for electronic devices such as non-volatile memory devices are described. The memory devices include a multi-layer control dielectric, such as a double or triple layer. The multi-layer control dielectric includes a combination of high-k dielectric materials such as aluminum oxide (Al2O3), hafnium oxide (HfO2), and/or hybrid films of hafnium aluminum oxide. The multi-layer control dielectric provides enhanced characteristics, including increased charge retention, enhanced memory program/erase window, improved reliability and stability, with feasibility for single or multistate (e.g., two, three or four bit) operation.

Abstract: Methods and apparatuses for electronic devices such as non-volatile memory devices are described. The memory devices include a multi-layer control dielectric, such as a double or triple layer. The multi-layer control dielectric includes a combination of high-k dielectric materials such as aluminum oxide (Al2O3), hafnium oxide (HfO2), and/or hybrid films of hafnium aluminum oxide. The multi-layer control dielectric provides enhanced characteristics, including increased charge retention, enhanced memory program/erase window, improved reliability and stability, with feasibility for single or multistate (e.g., two, three or four bit) operation.

Abstract: A system for modeling fluid flow in a valve (10) includes a section for modeling a main fluid flow domain having an inlet (25), a first outlet (26) and a second outlet using a first grid size, a section for modeling a leakage fluid flow domain (38) having an inlet that includes the main fluid flow domain second outlet and a leakage fluid flow outlet using a second grid size, and a section for iteratively calculating fluid flow in the main fluid flow domain based on leakage flow as determined by the section for modeling leakage fluid flow. Also a method for modeling fluid flow in a valve.