Abstract: The present invention relates to a mobile apparatus comprising an integrated circuit to operate predefined functions, which integrated circuit is susceptible to be set in a standby operating mode wherein which said circuit can resume operation within a predefined delay. The circuit comprises configuration sequential logic having defined states that need to be stored before the circuit enters in standby mode. The mobile apparatus further comprises a power down unit for storing the states of the configuration sequential logic into a low leakage storage area during standby mode that reduces standby current considerably.

Abstract: A system (15) comprising at least two integrated processors (P1 and P2). These two processors (P1 and P2) are operably connected via a communication channel (17) for exchanging information. One processor (P1) has a processor bus (10), a shareable unit (13), and a DMA unit (11) with an external DMA channel (12). The DMA unit (11) and the sharable unit (13) are connected to the processor bus (10). The other processor (P2) has an access unit (21) which is a connectable to the external DMA channel (12) of the DMA unit (11). Due to this arrangement, a communication channel (17) can be established from the access unit (21) which is connectable to the external DMA channel (12), the DMA unit (11), and the processor bus (10).

Abstract: A multicell amplifier comprises a first divider unit, which receives the input signal of the amplifier, divides it into 2N subsignals, amplifies them and recombines the amplified signals in two N-way combiners to form two local output signals; two further divider units which take the local output signals and divide them into 4N subsignals, amplify them and recombine the amplified signals to form three local output signals; and two combiner units which take the three local output signals and divide them into 4N subsignals, amplify them and recombine the amplified signals to provide the output signal of the amplifier.

Abstract: A bondwire transition arrangement for interconnecting a signal port on one IC of a multichip module with a signal port on another, adjacent, IC of the same module employs a distributed signal-transition process in which the signal on one port appears as subsignals at tapping points along a series transmission-line segment arrangement between that port and ground on the same IC and the subsignals are recombined along a second series transmission-line segment arrangement connected between the other port and ground on the other IC. Spatially corresponding tapping points are interconnected via bondwires.

Abstract: A circular polarized array antenna includes: groups of at least one set of patches for radiating and/or receiving a circular polarised electromagnetic wave; and a network of feeding lines, each feeding line being coupled to and extending longitudinally or vertically to one of the sets for transferring signal energy to and/or from the set. Each of the feeding lines coupled to the sets is pointing into a direction different from the pointing direction of the other feeding lines in order to achieve a circular orientation of the network of feeding lines.

Abstract: A method for reducing line-conducted interference in a pulse width modulated triggering system of an electric motor, a triggering pulse width modulation signal having, in one clock cycle, one or more signal edges between a first signal level and a second signal level, the pulse width modulation signal being generated in such a way that at least one of the signal edges has a first segment having a first edge slope and a second segment having a second edge slope, the absolute value of the first edge slope being less than the absolute value of the second edge slope.

Abstract: A method is described for determining an operating state on triggering a fan motor, the fan motor being operated with the aid of a switching device, the switching device being activated via a pulse-width-modulated triggering signal, a pulse duty factor of the triggering signal predefining a triggering state of the fan motor, a voltage potential at the node between fan motor and switching device or a motor current being measured as a measured variable, an operating state being determined on triggering the fan motor as a function of the measured variable and the pulse duty factor.

Abstract: An integrated semiconductor mixer includes a substrate (10), a radio-frequency balun (12) disposed on the substrate (10), a local oscillator balun (14) disposed on the substrate (10), an intermediate-frequency port (16) disposed on the substrate (10), and a mixer diode array (18), disposed on the substrate (10), that communicates with the radio-frequency balun (12), the local oscillator balun (14), and the intermediate-frequency port (16), in which the radio-frequency balun (12) is shielded from the local oscillator balun (14) by plated holes (20).

Abstract: A method for controlling a first fan motor using a first pulse width modulation signal having a first pulse control factor, and for controlling a second fan motor using a second pulse width modulation signal having a second pulse control factor, so as to bring about an overall air output according to a prespecified setpoint air output by the operation of the first and the second fan motor, a low-pass filter being provided in parallel to the fan motors in order to smooth out voltage fluctuations in voltage supply lines, wherein the first and the second pulse control factor are made available independently of each other, in order to minimize the current through the low-pass filter.

Abstract: The invention relates to Method to detect a sluggishness or the blocking of an electric drive (3), which is triggered via a power semiconductor component (7). The electric drive (3) can be operated in both a partial load range (PWM timing signal<100%) as well as in a full load range (PWM timing signal=100%), but always as a function of the timing of the PWM signal (29, 30). An evaluation circuit (37) is connected with a micro-controller (25). Pulses generated within a time interval are detected in the evaluation circuit (37) from the current I flowing via the first power semiconductor component (7) and the number of detected pulses A1*, A2* are compared with a to-be-expected number of pulses A1, A2.

Abstract: The data processing device according to the invention comprises a first processing unit (1) linked to a first bus (5), a second processing unit (2) linked to a second bus (6), a first bus master (3) linked to the first bus (5), a second bus master (4) linked to the second bus (6), a first and a second communication channel (7, 20, 8, 21) linking the first and the second bus master (3, 4) with each other, and a control unit (9) controlling the data transfer between the first and the second bus master (3, 4) via the first and the second communication channel (7, 20, 8, 21).

Abstract: A method for reducing line-conducted interference in a pulse width modulated triggering system of an electric motor, a triggering pulse width modulation signal having, in one clock cycle, one or more signal edges between a first signal level and a second signal level, the pulse width modulation signal being generated in such a way that at least one of the signal edges has a first segment having a first edge slope and a second segment having a second edge slope, the absolute value of the first edge slope being less than the absolute value of the second edge slope.

Abstract: A millimetric-wave amplifier arrangement comprises a first amplifier whose output is connected to one input of the second amplifier via an adjustable attenuator. Both amplifiers are integrated on a single substrate.

Abstract: A method for triggering an electric motor with a pulse width modulation signal, the pulse width modulation signal having a triggering frequency and a pulse duty factor, the electric motor being controlled as a function of the pulse duty factor via a supply voltage line, at least one electrical component being provided for low-pass filtering of the voltage fluctuations caused on the supply voltage line by the pulse width modulation signal, wherein the triggering frequency of the pulse width modulation signal is modified as a function of the pulse duty factor.

Abstract: System comprising at least two integrated processors (P1 and P2). These two processors (P1 and P2) are operably connected via two bi-directional communication channels for exchanging information. For establishing the bi-directional communication channels, the system comprises a first processor bus (10) to which the first processor (P1) is connected, a first direct memory access unit (45), a first programmable unit (34), and a first shareable unit (13). The programmable unit (34) can be programmed by the first processor (P1). Also comprised is a second processor bus (20), the second processor (P2) being connectable to the second processor bus (20), a second direct memory access unit (35), and a second programmable unit (44). Said second programmable unit (44) is programmable by the second processor (P2).

Abstract: The invention relates to a circuit arrangement and a method for operating an electric motor in a direct voltage source, in particular for operating a permanent-magnet-excited DC motor in the direct voltage network of a motor vehicle, having a rotary position transducer (32) for detecting the rotary position of the rotor (20), and having an electronic commutation controller (32) for switching over the current in the armature winding of the stator (12) as a function of the position of the rotor (20). It is proposed that the rotary position transducer (32) is positioned relative to the stator (12) for an early commutation, and that the actual commutation time can be set by means of a delay correction, ascertained by measurement separately for each motor (10), in the electronic commutation controller (30).

Abstract: The invention relates to Method to detect a sluggishness or the blocking of an electric drive (3), which is triggered via a power semiconductor component (7). The electric drive (3) can be operated in both a partial load range (PWM timing signal<100%) as well as in a full load range (PWM timing signal=100%), but always as a function of the timing of the PWM signal (29, 30). An evaluation circuit (37) is connected with a micro-controller (25). Pulses generated within a time interval are detected in the evaluation circuit (37) from the current I flowing via the first power semiconductor component (7) and the number of detected pulses A1*, A2* are compared with a to-be-expected number of pulses A1, A2.

Abstract: A task-like user interface is provided for Web-based applications. Preferred embodiments enable users to initiate multiple instances of tasks within a single Web application, where independent state information is retained for each instance. Each user-initiated task also has a prescribed life cycle with a definite start and end. Resources allocated to perform various activities can therefore be released when the activity ends. Optionally, contextual information can be passed to a task upon invocation. Support for persisting a currently-viewable work unit as a user-selectable favorite may optionally be provided.

Abstract: A step-up frequency converter includes a first and a second input for two input signals that are to be mixed, the first input signal having a lower frequency than the second input signal, a first and a second control element each of which is provided with a control connection and two main connections, the flow of current between the main connections being controllable by means of a signal at the control connection, and an output for a mixed signal generated from the two input signals that are to be mixed. The control connections of the two control elements are connected to the second input signal in a counter-clocked mode while the first connections of the two control elements are connected to each other and to the output. A first symmetrizer connects the input for the first input signal to the first main connections of the two control elements.

Abstract: The present invention relates to a circular polarised array antenna comprising groups of at least one set of patches for radiating and/or receiving a circular polarised electromagnetic wave, a network of feeding lines, each feeding line being coupled to and extending longitudinally or vertically to one of the sets for transferring signal energy to and/or from the set whereby each group of feeding lines being coupled to a group of sets is pointing into a direction different from the pointing direction of the other groups of feeding lines in order to achieve a circular orientation of the network of feeding lines and respectively two adjacent groups of feeding lines include the same angle. The invention further relates to a method for executing the steps on the array antenna, to a beam-switching array antenna and to a method for a beam-switching array antenna.