Patents by Inventor Stefan Linder

Stefan Linder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020195658
    Abstract: In a method of manufacturing a semiconductor element (6) having a cathode (3) and an anode (5), the starting material used is a relatively thick wafer (1) to which, as a first step, a barrier region (21) is added on the anode side. It is then treated on the cathode side, and the thickness of the wafer (1) is then reduced on the side opposite to the cathode (3), and an anode (5) is produced on this side in a further step. The result is a relatively thin semiconductor element which can be produced economically and without epitaxial layers.
    Type: Application
    Filed: August 21, 2002
    Publication date: December 26, 2002
    Applicant: Asea Brown Boveri AG
    Inventor: Stefan Linder
  • Patent number: 6475876
    Abstract: In a process for fabricating a semiconductor component, in particular a semiconductor diode, a semiconductor substrate (1) is provided with metal layers (3, 4) in order to form electrode terminals and with passivation (2), and is exposed to particle irradiation (P) in order to adjust the carrier lifetime. This being the case, at least the metal layer (3) on the irradiation side and the passivation (2) are not applied until after the particle irradiation (P). As a result, a continuous defect region (5), which precludes undesired edge effects, is obtained in the semiconductor substrate (1).
    Type: Grant
    Filed: August 16, 1999
    Date of Patent: November 5, 2002
    Assignee: ABB Schweiz Holding AG
    Inventors: Norbert Galster, Stefan Linder
  • Publication number: 20020045321
    Abstract: In a process for fabricating a semiconductor component, in particular a semiconductor diode, a semiconductor substrate (1) is provided with metal layers (3, 4) in order to form electrode terminals and with passivation (2), and is exposed to particle irradiation (P) in order to adjust the carrier lifetime. This being the case, at least the metal layer (3) on the irradiation side and the passivation (2) are not applied until after the particle irradiation (P). As a result, a continuous defect region (5), which precludes undesired edge effects, is obtained in the semiconductor substrate (1).
    Type: Application
    Filed: August 16, 1999
    Publication date: April 18, 2002
    Inventors: NORBERT GALSTER, STEFAN LINDER
  • Patent number: 6268796
    Abstract: A radio frequency identification device (RFID) has an antenna formed on a chip. The chip has backside and a front side coated with conductive traces, which are connected through conductive traces on the sides of two elongate through-hole slots formed on the chip to form an operative coil having the chip as a core. In one embodiment, the antenna chip may be stacked above an integrated circuit. In another embodiment, the integrated circuit may be formed on the antenna chip. The antenna chip may include a high magnetic permeability layer to increase the inductance of the coil, a capacitor to tune the coil to a desired frequency, and a coupling capacitor to power the integrated circuit. As well as the specific application disclosed, an inductance useful in numerous applications can be formed according to the above structure.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: July 31, 2001
    Inventors: Alfred Gnadinger, Stefan Linder
  • Patent number: 6107651
    Abstract: In a gate turn-off thyristor (GTO) with homogeneous anode, emitter and stop layer, a device which short-circuit the stop layer with the anode is provided in an edge termination region. As a result, in a reverse-biased state, the GTO has a structure of a diode in the edge region and amplification of a reverse current is obviated. With this structure, thermal loading in the edge region is reduced, as the GTO tolerates a higher operating temperature at a predetermined voltage.
    Type: Grant
    Filed: July 30, 1998
    Date of Patent: August 22, 2000
    Assignee: Asea Brown Boveri AG
    Inventors: Stefan Linder, Andre Weber