Patents by Inventor Stefan Mollov
Stefan Mollov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12013428Abstract: The present invention concerns a method and device for monitoring the gate signal of a power semiconductor (SI), the gate signal of the power semiconductor (SI) being provided by a gate driver (12), generates an expected signal (VGexp) that corresponds to the signal outputted by the gate driver (12) when no deterioration of the gate driver (12) and/or of the power semiconductor (SI) and/or of a load linked to the power semiconductor (SI) exists, compares the expected signal (VGexp) and the signal (VGmeas) outputted by the gate driver (12), determines if a deterioration of the gate driver (12) and/or of the power semiconductor (SI) and/or of a load linked to the power semiconductor (SI) exists using the result of the comparing of the expected signal (VGexp) and the signal (VGmeas) outputted by the gate driver (12).Type: GrantFiled: January 16, 2020Date of Patent: June 18, 2024Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Nicolas Degrenne, Julio Cezar Brandelero, Stefan Mollov
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Patent number: 11955539Abstract: A device comprising a gate pad, a source pad and a passive actuator arranged to form a reversible mechanical and electrical connection between the gate pad and the source pad only if the temperature in the passive actuator exceeds a threshold value.Type: GrantFiled: March 27, 2020Date of Patent: April 9, 2024Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Julio Cezar Brandelero, Jeffrey Ewanchuk, Stefan Mollov
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Patent number: 11929346Abstract: The present invention concerns a method and a device for increasing the reliability of a power module composed of plural power semiconductors that are connected in parallel, the power semiconductors being connected to the external pins of the package of the power module through metallic connections. The invention: —selects one power semiconductor among the power semiconductors connected in parallel according to a criterion, —applies a same input patient to the not selected power semiconductors connected in parallel, —increases the temperature of the selected power semiconductor in order to reach a target temperature of the power semiconductor during a time duration in order to achieve and interface grain homogenisation of the metallic connections of the selected power semiconductor, —applies the same input pattern to the selected power semiconductor after the time duration.Type: GrantFiled: March 8, 2021Date of Patent: March 12, 2024Assignee: Mitsubishi Electric CorporationInventors: Julio Cezar Brandelero, Stefan Mollov
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Publication number: 20240014046Abstract: The present invention concerns a method and a device for making an integrated cooling liquid cavity in a printed circuit board by inserting a power semiconductor die in a dielectric material, laminating the dielectric material with a dielectric material and a thin electrically conducting layer on each side of the dielectric material, drilling vias through the laminated copper and dielectric layers, metallizing the vias in order to form a first printed circuit board, laminating a dielectric material, a soluble material having a predetermined form and an electrically conducting layer on the first printed circuit board, injecting solvent in the soluble material in order to dissolve the soluble material and reveal a cavity injecting cooling liquid in the revealed cavity.Type: ApplicationFiled: June 16, 2021Publication date: January 11, 2024Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Julien MORAND, Stefan MOLLOV
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Patent number: 11791254Abstract: An electrical power assembly, comprising: at least one multilayer base structure, at least one power device embedded in the at least one multilayer base structure, an internal electrically conductive layer positioned on each side of the multilayer base structure, the internal electrically conductive layer being connected to a respective electrical contact of the power device through connections arranged in the multilayer base structure; at least one external electrically conductive layers positioned on each side of the base structure, each external electrically conductive layer comprising at least one pre-drilled through hole, at least one internal electrically insulating layer positioned between the internal electrically conductive layer of the base structure and a respective external electrically conductive layer, at least one hole arranged in the internal electrically insulating layer and the external electrically conductive layer, a portion of each hole being formed by the pre-drilled through hole, the atType: GrantFiled: January 20, 2020Date of Patent: October 17, 2023Assignee: Mitsubishi Electric CorporationInventors: Roberto Mrad, Stefan Mollov
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Patent number: 11735998Abstract: A current going through the first power semiconductor is sensed by a first and a second current derivative sensing means, the current going through the second semiconductor is sensed by a third and a fourth current derivative sensing means, when the current going through the first power semiconductor increases, the first current derivative means providing a positive voltage and the second current derivative means providing an opposite negative voltage, when the current going through the second power semiconductor increases, the third current derivative means providing a positive voltage and the fourth current derivative means providing an opposite voltage and the system reduces the voltage on the gate of the first power semiconductor if the first and third current derivative means provide voltages of same sign and reduces the voltage on the gate of the second power semiconductor if the second and fourth current derivative means provide voltages of same sign.Type: GrantFiled: November 14, 2019Date of Patent: August 22, 2023Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Julien Morand, Stefan Mollov
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Publication number: 20230145900Abstract: A switching method for a half bridge power converter includes at least a pair of power switches in legs of the convertor providing upper and lower branch power switches and first and second gate control circuits for the upper and lower branch power switches. The switching method includes sensing the current derivative in the upper and lower branches during switching of the pair of power switches to provide a first signal and a second signal proportional to the current derivative of the power current in the upper and lower power switches, summing the first and second signals to provide a summed current derivative signal, and adding the summed current derivative signal to the power switch command signal of the first and second gate control circuits causing the summed derivative signals to modulate the gate commutation signals of the gate control circuits.Type: ApplicationFiled: February 4, 2021Publication date: May 11, 2023Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Johan LE LESLE, Julien MORAND, Stefan MOLLOV
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Publication number: 20230141711Abstract: The present invention concerns a method and a device for increasing the reliability of a power module composed of plural power semiconductors that are connected in parallel, the power semiconductors being connected to the external pins of the package of the power module through metallic connections. The invention - selects one power semiconductor among the power semiconductors connected in parallel according to a criterion. - applies a same input patient to the not selected power semiconductors connected in parallel. - increases the temperature of the selected power semiconductor in order to reach a target temperature of tlic power semicon- ductor dunng a time duration m order to achieve and interface grain homogenisation of the metallic connections of tlic selected power semiconductor. - applies the same input pattern to tlic selected pow er semiconductor after tlic time duration.Type: ApplicationFiled: March 8, 2021Publication date: May 11, 2023Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Julio Cezar BRANDELERO, Stefan MOLLOV
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Patent number: 11630154Abstract: The invention: determines if the duration of the conducting state of the semiconductors in a first cycle of the pulse width modulation is upper than a predetermined duration, measures, during the conducting state of the semiconductors at a second cycle, the voltage provided to the load, sequentially disables the conduction of each semiconductor during a part of the duration of the conducting state of the semiconductors in a third cycle and measures the voltage provided to the load, determines the differences between the voltage measured during the second cycle and each voltage measured during the third cycle, orders the differences according to their value, checks if the determined order is identical to an order stored in a memory of the device and determines that one connection of one semiconductor is deteriorated if the order is changed.Type: GrantFiled: January 20, 2020Date of Patent: April 18, 2023Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Jeffrey Ewanchuk, Julio Brandelero, Stefan Mollov
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Publication number: 20230053137Abstract: The present invention concerns a device and a method for sensing an over-temperature of a power semiconductor. The invention: provides a current pulse source through control electrodes of the power semiconductor, duplicates the current provided by the current pulse source and provides the duplicated current to an emulating device, compares the voltage across the control electrodes to the voltage across the emulating device, notifies the result of the comparison.Type: ApplicationFiled: December 17, 2020Publication date: February 16, 2023Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Chihiro KAWAHARA, Julio BRANDELERO, Stefan MOLLOV
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Publication number: 20230003586Abstract: The present disclosure relates to a method for estimating parameters of a junction of a power semi-conductor element comprising: •—Detecting at least one stable on-line operating condition through measurements (2, 3, 4) of Von, Ion, Tc on a semi-conductor module (1) where Ion is a current for which the on-state voltage Von of the semi-conductor is sensitive to the temperature and Tc is the temperature of the casing of said semi-conductor element; •—Measuring and storing at least one parameter set Von, Ion, Tc of said at least one stable operating condition; •—in a calculating unit (52), providing calculations for minimizing the error between a junction temperature estimation Tj of an electrical model Tj=F(Von, Ion, ?elec) comprising a first set of unknown parameters ?elec and another junction temperature estimation Tjmod of a loss/thermal model Tj=G(lon, Tc, ? mod) comprising a second set of unknown parameters ? mod and obtaining at least one set of parameters ?elec and at least one parameter ? mod providingType: ApplicationFiled: October 23, 2020Publication date: January 5, 2023Applicant: Mitsubishi Electric CorporationInventors: Nicolas DEGRENNE, Nicolas VOYER, Stefan MOLLOV
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Patent number: 11448557Abstract: A method for determining the junction temperature of at least one die of a semiconductor power module, the semiconductor power module being composed of plural dies connected in parallel and switching between conducting and non conductor states according to pattern cycles, the method comprises the steps of: disabling the conducting of the at least one die during at least a fraction of one switching cycle, applying a current limited voltage to the gate of the at least one die during a period of time of the cycle wherein the at least one die is not conducting, the resulting voltage excursion having a value that does not enable the die to be conducting, measuring the voltage at the gate of the die, deriving from the measured voltage a temperature variation of the junction of the at least one die or the temperature of the junction of the die.Type: GrantFiled: January 30, 2017Date of Patent: September 20, 2022Assignee: Mitsubishi Electric CorporationInventors: Jeffrey Ewanchuk, Stefan Mollov, Jonathan Robinson, Julio Brandelero
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Patent number: 11378612Abstract: A device having at least one power semiconductor die coated with a metallization and at least one light guide having two opposite ends. The first end is able to be connected at least to a light source and to a light receiver. The second end is permanently fixed facing to a surface of the metallization such that to form a light path towards said surface and a light path from said surface.Type: GrantFiled: February 26, 2018Date of Patent: July 5, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Nicolas Degrenne, Stefan Mollov, Jeffrey Ewanchuk
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Publication number: 20220208997Abstract: A device comprising a gate pad, a source pad and a passive actuator arranged to form a reversible mechanical and electrical connection between the gate pad and the source pad only if the temperature in the passive actuator exceeds a threshold value.Type: ApplicationFiled: March 27, 2020Publication date: June 30, 2022Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Julio Cezar BRANDELERO, Jeffrey EWANCHUK, Stefan MOLLOV
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Publication number: 20220148958Abstract: An electrical power assembly, comprising: at least one multilayer base structure, at least one power device embedded in the at least one multilayer base structure, an internal electrically conductive layer positioned on each side of the multilayer base structure, the internal electrically conductive layer being connected to a respective electrical contact of the power device through connections arranged in the multilayer base structure; at least one external electrically conductive layers positioned on each side of the base structure, each external electrically conductive layer comprising at least one pre-drilled through hole, at least one internal electrically insulating layer positioned between the internal electrically conductive layer of the base structure and a respective external electrically conductive layer, at least one hole arranged in the internal electrically insulating layer and the external electrically conductive layer, a portion of each hole being formed by the pre-drilled through hole, the atType: ApplicationFiled: January 20, 2020Publication date: May 12, 2022Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Roberto MRAD, Stefan MOLLOV
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Publication number: 20220115945Abstract: A current going through the first power semiconductor is sensed by a first and a second current derivative sensing means, the current going through the second semiconductor is sensed by a third and a fourth current derivative sensing means, when the current going through the first power semiconductor increases, the first current derivative means providing a positive voltage and the second current derivative means providing an opposite negative voltage, when the current going through the second power semiconductor increases, the third current derivative means providing a positive voltage and the fourth current derivative means providing an opposite voltage and the system reduces the voltage on the gate of the first power semiconductor if the first and third current derivative means provide voltages of same sign and reduces the voltage on the gate of the second power semiconductor if the second and fourth current derivative means provide voltages of same sign.Type: ApplicationFiled: November 14, 2019Publication date: April 14, 2022Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Julien MORAND, Stefan MOLLOV
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Publication number: 20220107363Abstract: The invention: determines if the duration of the conducting state of the semiconductors in a first cycle of the pulse width modulation is upper than a predetermined duration, measures, during the conducting state of the semiconductors at a second cycle, the voltage provided to the load, sequentially disables the conduction of each semiconductor during a part of the duration of the conducting state of the semiconductors in a third cycle and measures the voltage provided to the load, determines the differences between the voltage measured during the second cycle and each voltage measured during the third cycle, orders the differences according to their value, checks if the determined order is identical to an order stored in a memory of the device and determines that one connection of one semiconductor is deteriorated if the order is changed.Type: ApplicationFiled: January 20, 2020Publication date: April 7, 2022Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Jeffrey EWANCHUK, Julio BRANDELERO, Stefan MOLLOV
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Publication number: 20220091177Abstract: The present invention concerns a method and device for monitoring the gate signal of a power semiconductor (SI), the gate signal of the power semiconductor (SI) being provided by a gate driver (12), generates an expected signal (VGexp) that corresponds to the signal outputted by the gate driver (12) when no deterioration of the gate driver (12) and/or of the power semiconductor (SI) and/or of a load linked to the power semiconductor (SI) exists, compares the expected signal (VGexp) and the signal (VGmeas) outputted by the gate driver (12), determines if a deterioration of the gate driver (12) and/or of the power semiconductor (SI) and/or of a load linked to the power semiconductor (SI) exists using the result of the comparing of the expected signal (VGexp) and the signal (VGmeas) outputted by the gate driver (12).Type: ApplicationFiled: January 16, 2020Publication date: March 24, 2022Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Nicolas DEGRENNE, Julio Cezar BRANDELERO, Stefan MOLLOV
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Patent number: 11251151Abstract: The present invention concerns a system for allowing the restoration of an interconnection of a die of a power module, a first terminal of the interconnection being fixed on the die and a second terminal of the interconnection being connected to an electric circuit. The system comprises:—at least one material located in the vicinity of the first terminal of the interconnection, the material having a predetermined melting temperature,—means for controlling the temperature of the die at the predetermined melting temperature during a predetermined period of time. The present invention concerns also the method.Type: GrantFiled: October 31, 2018Date of Patent: February 15, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Jeffrey Ewanchuk, Julio Brandelero, Stefan Mollov
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Patent number: 11217571Abstract: A power module (1) is disclosed, comprising: first and second substrates (10), each substrate patterned layer of electrically conductive material (12), a plurality of pre-packed power cells (20), positioned between the substrates, each cell comprising: an electrically insulating core (21) embedding at least one power die (22), and two external layers (23) of electrically conductive material on opposite sides of the electrically insulating core (21), said external layers being respectively connected to each patterned layers of the substrates, wherein each external layer of a pre-packed power cell comprises a contact pad (230) connected to a respective contact (220) of the power die through connections arranged in the electrically insulating core (21), said contact pad having a surface area greater than the surface area of the power die electrical contact to which it is connected.Type: GrantFiled: March 5, 2019Date of Patent: January 4, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Julien Morand, Remi Perrin, Roberto Mrad, Jeffrey Ewanchuk, Stefan Mollov