Patents by Inventor Stefan PFEFFERLEIN

Stefan PFEFFERLEIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240038630
    Abstract: A semiconductor module includes a first substrate, a second substrate having a closed, in particular continuous, hollow chamber structure, and a semiconductor element having a first side connected to the first substrate in a planar manner and a second side which faces away from the first side and is connected to the second substrate in a planar manner. A phase change material is arranged in the hollow chamber structure of the second substrate and in thermally conductive connection with the semiconductor element.
    Type: Application
    Filed: October 12, 2021
    Publication date: February 1, 2024
    Applicant: Siemens Aktiengesellschaft
    Inventors: STEFAN PFEFFERLEIN, RONNY WERNER
  • Publication number: 20240038618
    Abstract: A semiconductor module includes a semiconductor element having a first side in contact with a first substrate in a planar manner, and a second side which faces away from the first side and contacts a metallic heat sink in a planar manner. The heat sink is in thermally conductive connection with the semiconductor element and connected to the second substrate in an electrically conductive manner. The heat sink includes a main body for planar contacting of the semiconductor element and a fin arranged in a recess of the second substrate. The second substrate is connected in an electrically conductive manner to the main body which has a circumferential contact surface around the fin to establish a material-bonded connection with a substrate metallization of the second substrate. The circumferential contact surface is arranged on a side of the main body facing away from the semiconductor element.
    Type: Application
    Filed: November 3, 2021
    Publication date: February 1, 2024
    Applicant: Siemens Aktiengesellschaft
    Inventors: Stefan Pfefferlein, FELIX ZEYSS
  • Publication number: 20230337374
    Abstract: The invention relates to a housing (1) for an electrical appliance (20) comprising a housing body (2) which at least partially houses an electrical component (3) of the electrical appliance (20), the housing body (2) having at least one support point (4) for being supported on a plate (5) to which the electrical component (3) is connected, the housing (1) also having at least one temperature sensor (6) for sensing the temperature of the plate (5), each temperature sensor (6) being arranged in the housing body (2) in the region of a support point (4). The invention also relates to an electrical appliance (20) comprising at least one electrical component (3), at least one plate (5), which is connected in each case to the electrical component (3), and at least one housing (1) of the aforementioned kind, the housing body (2) being supported at the support point (4) on the plate (5).
    Type: Application
    Filed: July 28, 2021
    Publication date: October 19, 2023
    Inventors: Bernd Kürten, Stefan Pfefferlein
  • Patent number: 11756857
    Abstract: An electronic circuit has three circuit carriers and two semiconductor components. A first semiconductor component contacts with its upper side an underside of a first circuit carrier, and with its underside an upper side of a second circuit carrier. The first circuit carrier has vias, with a first via connecting the first semiconductor component to a first conducting path and a second via connecting a connection element forming a second conducting path providing an integral connection between the circuit carriers. A second semiconductor component contacts the underside of the first circuit carrier and is electrically connected to the first or second conducting path. An underside of the second semiconductor component contacts an upper side of the third circuit carrier. A lateral thermal expansion coefficient of the first circuit carrier is greater than a lateral thermal expansion coefficient of both the second and the third circuit carrier.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: September 12, 2023
    Assignee: Siemens Aktiengesellschaft
    Inventors: Thomas Bigl, Alexander Hensler, Stephan Neugebauer, Stefan Pfefferlein
  • Patent number: 11723177
    Abstract: A cooling device for heat dissipation from an electronic component includes a heating tube having a heating tube surface, a cooling element having a first cooling element side formed with a slot recess which at least partially encloses the heating tube, and a fiber structure made of fibers and arranged on the heating tube surface in a region in which the heating tube is at least partially enclosed by the slot recess. The fibers on the heating tube surface of the heating tube in the region of the slot recess form a mechanical connection with a cooling element surface of the cooling element.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: August 8, 2023
    Assignee: Siemens Aktiengesellschaft
    Inventors: Thomas Bigl, Alexander Hensler, Stephan Neugebauer, Ewgenij Ochs, Philipp Oschmann, Stefan Pfefferlein, Ulrich Wetzel
  • Patent number: 11723155
    Abstract: A circuit carrier includes a first side, two layers arranged to define an intermediate space there between, with at least one of the two layers being electrically conductive and attached to the first side. The at least one of the two layers has a region deformed such as to exhibit an indentation and has a trace structure in the indentation. A first insulating material fills the intermediate space, and a second insulating material fills the indentation, A second side in opposition to the first side is shaped to have in the deformed region a cut-out for receiving a bare die such as to come into an electrical contact with the at least one of the two layers.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: August 8, 2023
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventor: Stefan Pfefferlein
  • Patent number: 11398423
    Abstract: A semiconductor assembly includes a carrier element with a first carrier element conductor path, a semiconductor chip, an electrically insulating element having a first insulating element conductor path, and a first spacer element. The semiconductor chip is connected electrically and mechanically on a first semiconductor side via a first connecting material to the first carrier element conductor path. The semiconductor chip is connected on a second semiconductor side, which faces away from the first semiconductor side of the semiconductor chip, via a second connecting material to the first insulating element conductor path, which is arranged on a first insulating element side of the electrically insulating element. The first spacer element is arranged for maintaining a distance between the carrier element and an assembly element facing toward the second semiconductor side of the semiconductor chip and is connected mechanically to both the carrier element and the assembly element.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: July 26, 2022
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ewgenij Ochs, Stefan Pfefferlein
  • Publication number: 20220208643
    Abstract: An electronic circuit has three circuit carriers and two semiconductor components. A first semiconductor component contacts with its upper side an underside of a first circuit carrier, and with its underside an upper side of a second circuit carrier. The first circuit carrier has vias, with a first via connecting the first semiconductor component to a first conducting path and a second via connecting a connection element forming a second conducting path providing an integral connection between the circuit carriers. A second semiconductor component contacts the underside of the first circuit carrier and is electrically connected to the first or second conducting path. An underside of the second semiconductor component contacts an upper side of the third circuit carrier. A lateral thermal expansion coefficient of the first circuit carrier is greater than a lateral thermal expansion coefficient of both the second and the third circuit carrier.
    Type: Application
    Filed: June 5, 2020
    Publication date: June 30, 2022
    Applicant: Siemens Aktiengesellschaft
    Inventors: THOMAS BIGL, ALEXANDER HENSLER, STEPHAN NEUGEBAUER, STEFAN PFEFFERLEIN
  • Publication number: 20220007543
    Abstract: A cooling device for heat dissipation from an electronic component includes a heating tube having a heating tube surface, a cooling element having a first cooling element side formed with a slot recess which at least partially encloses the heating tube, and a fiber structure made of fibers and arranged on the heating tube surface in a region in which the heating tube is at least partially enclosed by the slot recess. The fibers on the heating tube surface of the heating tube in the region of the slot recess form a mechanical connection with a cooling element surface of the cooling element.
    Type: Application
    Filed: October 31, 2019
    Publication date: January 6, 2022
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventors: THOMAS BIGL, ALEXANDER HENSLER, STEPHAN NEUGEBAUER, EWGENIJ OCHS, PHILIPP OSCHMANN, STEFAN PFEFFERLEIN, ULRICH WETZEL
  • Publication number: 20210410299
    Abstract: A circuit carrier includes a first side, two layers arranged to define an intermediate space there between, with at least one of the two layers being electrically conductive and attached to the first side. The at least one of the two layers has a region deformed such as to exhibit an indentation and has a trace structure in the indentation. A first insulating material fills the intermediate space, and a second insulating material fills the indentation, A second side in opposition to the first side is shaped to have in the deformed region a cut-out for receiving a bare die such as to come into an electrical contact with the at least one of the two layers.
    Type: Application
    Filed: September 8, 2021
    Publication date: December 30, 2021
    Applicant: Siemens Aktiengesellschaft
    Inventor: Stefan Pfefferlein
  • Patent number: 11153977
    Abstract: A circuit carrier includes a first side, two layers arranged to define an intermediate space there between, with at least one of the two layers being electrically conductive and attached to the first side. The at least one of the two layers has a region deformed such as to exhibit an indentation and has a trace structure in the indentation. A first insulating material fills the intermediate space, and a second insulating material fills the indentation, A second side in opposition to the first side is shaped to have in the deformed region a cut-out for receiving a bare die such as to come into an electrical contact with the at least one of the two layers.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: October 19, 2021
    Assignee: Siemens Aktiengesellschaft
    Inventor: Stefan Pfefferlein
  • Patent number: 11056447
    Abstract: A power module includes a substrate having a first layer and a second layer which are connected to one another and arranged above one another. The first layer includes a first dielectric material having a metallization arranged on a side facing the second layer and the second layer includes a second dielectric material having a metallization arranged on a side facing away from the metallization of the first dielectric material. A power semiconductor having a first contact area and a second contact area opposite the first contact area is connected to the metallization of the first dielectric material via the first contact area and arranged in a first recess of the second layer. A metallic first encapsulation encapsulates the power semiconductor in a fluid-tight manner, with the second contact area of the power semiconductor being electrically conductively connected to the metallization of the second dielectric material via the first encapsulation.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: July 6, 2021
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventor: Stefan Pfefferlein
  • Patent number: 11056460
    Abstract: A method for producing an electric circuit in which a contact carrier comprising a first contact area and a second contact area is provided. An insulating body is applied to the circuit carrier and at least partially covers the first contact area and the second contact area. The insulating body comprises cut-outs in regions both contact areas. A flowable electrical conducting medium is introduced into the insulating body.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: July 6, 2021
    Assignee: Siemens Aktiengesellschaft
    Inventors: Stefan Pfefferlein, Thomas Bigl
  • Patent number: 10998249
    Abstract: A semiconductor assembly includes a semiconductor element having contacts on a first surface electrically connected with contacts of a carrier element by electrically conductive material. A second surface opposite the first surface has a convex curvature with a first radius or a concave curvature with a second radius. The second surface of the convex curvature or the second surface of the concave curvature is connected in a positive-fit manner to a cooling body surface of a concave cooling body curvature of the cooling body, and, during operation at a selected barrier layer temperature, the first radius of the convex curvature deviates by at most 10% from a third radius of the concave cooling body curvature, or the second radius of the concave curvature deviates by at most 10% from a fourth radius of the convex cooling body curvature.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: May 4, 2021
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Stefan Pfefferlein, Thomas Bigl, Ewgenij Ochs
  • Publication number: 20210100110
    Abstract: A circuit carrier includes a first side, two layers arranged to define an intermediate space there between, with at least one of the two layers being electrically conductive and attached to the first side. The at least one of the two layers has a region deformed such as to exhibit an indentation and has a trace structure in the indentation. A first insulating material fills the intermediate space, and a second insulating material fills the indentation, A second side in opposition to the first side is shaped to have in the deformed region a cut-out for receiving a bare die such as to come into an electrical contact with the at least one of the two layers.
    Type: Application
    Filed: September 25, 2020
    Publication date: April 1, 2021
    Applicant: Siemens Aktiengesellschaft
    Inventor: Stefan Pfefferlein
  • Patent number: 10966337
    Abstract: An electrical converter having pluggable converter components includes a first electronic assembly having electronic parts an assembly carrier, a housing chassis and a housing cover, wherein at least one of the electronic parts is a power semiconductor switch having a wide band gap and made of GaN or of InGaN. The power semiconductor switch is operated with a reverse bias of at least 400 V and at a clock frequency of at least 40 kHz during operation of the electrical converter. The first electronic assembly is mechanically plugged into the assembly carrier by connecting elements, and the first electronic assembly together with the assembly carrier is mechanically plugged and locked by further connecting elements to the housing chassis or to the housing cover using corresponding locking elements on the housing chassis or to the housing cover, respectively.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: March 30, 2021
    Assignee: Siemens Aktiengesellschaft
    Inventor: Stefan Pfefferlein
  • Publication number: 20210050290
    Abstract: A semiconductor assembly includes a carrier element with a first carrier element conductor path, a semiconductor, an electrically insulating element having a first insulating element conductor path, and a first spacer element. The semiconductor is connected electrically and mechanically on a first semiconductor side via a first connecting material to the first carrier element conductor path, The semiconductor is connected on a second semiconductor side, which faces away from the first semiconductor side of the semiconductor, via a second connecting material to the first insulating element conductor path, which is arranged on a first insulating element side of the electrically insulating element, The first spacer element is arranged for maintaining a distance between the carrier element and an assembly element facing toward the second semiconductor side of the semiconductor and is connected mechanically to both the carrier element and the assembly element.
    Type: Application
    Filed: March 26, 2019
    Publication date: February 18, 2021
    Applicant: Siemens Aktiengesellschaft
    Inventors: EWGENIJ OCHS, STEFAN PFEFFERLEIN
  • Publication number: 20210005529
    Abstract: A semiconductor assembly includes a semiconductor element having contacts on a first surface electrically connected with contacts of a carrier element by electrically conductive material. A second surface opposite the first surface has a convex curvature with a first radius or a concave curvature with a second radius. The second surface of the convex curvature or the second surface of the concave curvature is connected in a positive-fit manner to a cooling body surface of a concave cooling body curvature of the cooling body, and, during operation at a selected barrier layer temperature, the first radius of the convex curvature deviates by at most 10% from a third radius of the concave cooling body curvature, or the second radius of the concave curvature deviates by at most 10% from a fourth radius of the convex cooling body curvature.
    Type: Application
    Filed: November 19, 2018
    Publication date: January 7, 2021
    Applicant: Siemens Aktiengesellschaft
    Inventors: STEFAN PFEFFERLEIN, THOMAS BIGL, EWGENIJ OCHS
  • Publication number: 20200381370
    Abstract: A power module includes a substrate having a first layer and a second layer which are connected to one another and arranged above one another. The first layer includes a first dielectric material having a metallization arranged on a side facing the second layer and the second layer includes a second dielectric material having a metallization arranged on a side facing away from the metallization of the first dielectric material. A power semiconductor having a first contact area and a second contact area opposite the first contact area is connected to the metallization of the first dielectric material via the first contact area and arranged in a first recess of the second layer. A metallic first encapsulation encapsulates the power semiconductor in a fluid-tight manner, with the second contact area of the power semiconductor being electrically conductively connected to the metallization of the second dielectric material via the first encapsulation.
    Type: Application
    Filed: July 27, 2018
    Publication date: December 3, 2020
    Applicant: Siemens Aktiengesellschaft
    Inventor: STEFAN PFEFFERLEIN
  • Patent number: 10849255
    Abstract: A cooling apparatus for cooling an electronic component includes a heat sink, a heat sink cover to close a top area opening of the heat sink, a tube-shaped cooling element arranged inside the heat sink for some cooling ribs of the heat sink in mechanical contact with an outer side of the tube-shaped cooling element, and an impeller with blades for generating a cooling flow of a cooling medium. The tube-shaped cooling element forms a first cooling duct to conduct the cooling flow in a first cooling flow direction. A second cooling duct opposite the first cooling duct is formed between an inner area of the heat sink and the outer side of the tube-shaped cooling element to conduct the cooling flow in a second cooling flow direction. The cooling flow is redirected from the first cooling duct to the second cooling duct or vice versa.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: November 24, 2020
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventor: Stefan Pfefferlein