Abstract: Methods of fabricating optical devices with high refractive index materials are disclosed. The method includes forming a first oxide layer on a substrate and forming a patterned template layer with first and second trenches on the first oxide layer. A material of the patterned template layer has a first refractive index. The method further includes forming a first portion of a waveguide and a first portion of an optical coupler within the first and second trenches, respectively, forming a second portion of the waveguide and a second portion of the optical coupler on a top surface of the patterned template layer, and depositing a cladding layer on the second portions of the waveguide and optical coupler. The waveguide and the optical coupler include materials with a second refractive index that is greater than the first refractive index.

Abstract: In some embodiments, the present disclosure provides an optical module. A waveguide includes a rib, and further includes a first protrusion and a second protrusion respectively on opposite sides of the rib. Further, the waveguide is formed of a first semiconductor material. A photodetector is in the waveguide and comprises a PN junction in the rib. A P type region of the PN junction extends to the first protrusion, and an N type region of the PN junction extends to the second protrusion. Further, the first and second protrusions accommodate heavily doped P and N type contact regions. A semiconductor region is on the PN junction. The semiconductor region comprises a second semiconductor material different the first semiconductor material. For example, the second semiconductor material may have a smaller bandgap than the first semiconductor material to enhance quantum efficiency.

Abstract: A method includes etching a silicon layer to form a silicon slab and an upper silicon region over the silicon slab, and implanting the silicon slab and the upper silicon region to form a p-type region, an n-type region, and an intrinsic region between the p-type region and the n-type region. The method further includes etching the p-type region, the n-type region, and the intrinsic region to form a trench. The remaining portions of the upper silicon region form a Multi-Mode Interferometer (MMI) region. An epitaxy process is performed to grow a germanium region in the trench. Electrical connections are made to connect to the p-type region and the n-type region.

Abstract: A structure includes an optical interposer attached to a package substrate, wherein the optical interposer includes a silicon waveguide, a first photonic component optically coupled to the silicon waveguide, a second photonic component optically coupled to the silicon waveguide, and an interconnect structure extending over the silicon waveguide, over the first photonic component, and over the second photonic component, wherein the interconnect structure is electrically connected to the first photonic component and to the second photonic component, a first semiconductor device attached to the interconnect structure, wherein the first semiconductor device is electrically connected to the first photonic component through the interconnect structure, and a second semiconductor device attached to the interconnect structure, wherein the second semiconductor device is electrically connected to the second photonic component through the interconnect structure.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a test line structure disposed on a semiconductor workpiece. The test line structure includes a plurality of optical input/output (I/O) structures disposed within and/or on the semiconductor workpiece. The test line structure further includes a plurality of electrical I/O structures on the semiconductor workpiece. The plurality of optical I/O structures and the plurality of electric I/O structures are laterally spaced from one another along a line extending in a first direction.

Abstract: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. In one aspect, the semiconductor device includes a plurality of deep trench capacitors and a plurality of via contacts that at least partially surround the deep trench capacitors. Variations may be made to the number and locations of the plurality of via contacts such that design requirements for the packaging are satisfied.

Abstract: An integrated circuit structure includes a first and second power rail on a first level, a first and second set of conductive structures on a second level and a first, second and third conductive structure on a third level. The first set of conductive structures is over the first power rail. The second set of conductive structures is over the second power rail. The first conductive structure overlaps a first conductive structure of the first set of conductive structures and a first conductive structure of the second set of conductive structures. The second conductive structure overlaps a second conductive structure of the first set of conductive structures and a second conductive structure of the second set of conductive structures. The third conductive structure overlaps a third conductive structure of the first set of conductive structures and a third conductive structure of the second set of conductive structures.

Abstract: Disclosed are apparatus and methods for optical coupling.

Abstract: A photonic polarizing beamsplitter is disclosed. The beamsplitter comprises a first waveguide, a second waveguide located above the first waveguide, and a birefringent coupler between the first waveguide and the second waveguide. The birefringent coupler has an effective refractive index for a TM mode which is greater than a refractive index of the first waveguide, and an effective refractive index for a TE mode which is less than the refractive index of the first waveguide. The second waveguide comprises a plurality of outwardly tapering legs with a gap between adjacent legs that are connected downstream to a body. The vertical beamsplitter uses less surface area.

Abstract: A three-dimensional integrated circuit (3D IC) package is provided. The 3D IC package includes: a cache die including a low-dropout (LDO) regulator and a cache memory device; a compute die above the cache die, the compute die including a processor; and one or more first interconnect structures connecting the cache die and the compute die in a vertical direction.

Abstract: An optical device includes a first waveguide, ring-shaped waveguides adjacent to the first waveguide, and heaters coupled to the ring-shaped waveguides in one-to-one correspondence. A method includes coupling a first light source with a first wavelength to the first waveguide, increasing electric current through the heaters until a first one of the ring-shaped waveguides resonates, assigning the first one of the ring-shaped waveguides to the first wavelength, resetting the electric current through the heaters to the initial electric current, coupling a second light source with a second wavelength to the first waveguide wherein the second wavelength is different from the first wavelength, increasing the electric current through the heaters until a second one of the ring-shaped waveguides resonates wherein the second one of the ring-shaped waveguides is different from the first one of the ring-shaped waveguides, and assigning the second one of the ring-shaped waveguides to the second wavelength.

Abstract: Integrated circuit (IC) devices include a metal-insulator-metal (MIM) capacitor having a top electrode plate, a bottom electrode plate, and a plurality of intermediate electrode plates between the top electrode plate and the bottom electrode plate. A plurality of dielectric layers may separate each of the electrode plates of the MIM capacitor from adjacent plates of the MIM capacitor. Each of the intermediate electrode plates may have a thickness that is greater than a thickness of the top electrode plate and the bottom electrode plate. By providing multiple intermediate electrode plates between the top and bottom electrode plates of the MIM capacitor, and allocating the greatest plate thicknesses to the intermediate plates, the capacitance density may be increased in a given area of the IC device, which may provide increased performance for the IC device.

Abstract: A structure includes an optical interposer attached to a package substrate, wherein the optical interposer includes a silicon waveguide, a first photonic component optically coupled to the silicon waveguide, a second photonic component optically coupled to the silicon waveguide, and an interconnect structure extending over the silicon waveguide, over the first photonic component, and over the second photonic component, wherein the interconnect structure is electrically connected to the first photonic component and to the second photonic component, a first semiconductor device attached to the interconnect structure, wherein the first semiconductor device is electrically connected to the first photonic component through the interconnect structure, and a second semiconductor device attached to the interconnect structure, wherein the second semiconductor device is electrically connected to the second photonic component through the interconnect structure.

Abstract: Disclosed are apparatus and methods for optical coupling.

Abstract: A flip-flop circuit configured to latch an input signal to an output signal is disclosed. The circuit includes a first latch circuit; and a second latch circuit coupled to the first latch circuit. In some embodiments, in response to a clock signal, the first and second latch circuits are complementarily activated so as to latch the input signal to the output signal, and the first and second latch circuits each comprises at most two transistors configured to receive the clock signal.

Abstract: An optical analog-to-digital converter (O-ADC) converts an input optical signal (IOS) into an output digital signal. The O-ADC includes ADC stages, each of which can generate an electrical bit of the output digital signal and an optical bit. An ADC stage can include a photodetector, an ADC circuit, and an optical output circuit. The photodetector generates an analog electrical signal based on a portion of the IOS. The ADC circuit generates a digital electrical signal (electrical bit) based on the analog electrical signal and a reference analog electrical signal, which is based on a portion of a reference optical signal (ROS). The optical output circuit provides an output optical signal (OOS) (optical bit) based on the digital electrical signal and the portion of the ROS. Photodetectors of subsequent ADC stages generate analog electrical signals based further on an OOS from an optical output circuit of a previous respective ADC stage.

Abstract: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. In one aspect, the semiconductor device includes a plurality of deep trench capacitors and a plurality of via contacts that at least partially surround the deep trench capacitors. Variations may be made to the number and locations of the plurality of via contacts such that design requirements for the packaging are satisfied.

Abstract: An integrated circuit structure includes a first, second and third power rail extending in a first direction, a first, second and third set of conductive structures extending in the second direction, and being located at a second level, and a first, second and third conductive structure extending in the second direction, and being located at a third level. The first conductive structure overlaps a first conductive structure of the corresponding first, second and third set of conductive structures. The second conductive structure overlaps a second conductive structure of the corresponding first, second and third set of conductive structures. The third conductive structure overlaps a third conductive structure of the corresponding first, second and third set of conductive structures.

Abstract: An optical coupler includes: a plurality of waveguide core layers formed from a waveguide core material having a first index of refraction, the waveguide core layers being (i) arranged in a stacked relationship one over another, (ii) spaced apart one from another and (iii) extending from a light receiving end of the optical coupler longitudinally through the optical coupler toward a light output end of the optical coupler; and a cladding formed from a cladding material having a second index of refraction, the second index of refraction being less than the first index of refraction, the cladding material surrounding each of the plurality of waveguide core layers. Suitably, light propagating within outer ones of the plurality of waveguide core layers is directed toward an interior one of the plurality of waveguide core layers via evanescent coupling between adjacent ones of the plurality of waveguide core layers.

Abstract: A method includes: determining a first material and a second material of a photonic waveguide for propagating light, the photonic waveguide having a first section and a second section arranged in a first layer and a second layer, respectively, of the photonic waveguide; determining a spacing between the first layer and the second layer; determining a parameter set of a crosstalk reduction structure, according to the spacing, the first material and a wavelength of the light, to cause insertion losses of the first section and the second section to be lower than a predetermined threshold; and forming the first and second sections with the first and second materials, respectively, the first section having the crosstalk reduction structure overlapping the second section.