Abstract: The present disclosure provides a semiconductor device, a photonic circuit, and a method for adjusting a resonant wavelength of an optical modulator. The semiconductor device includes a substrate, a first waveguide disposed on the substrate, a second waveguide disposed on the substrate and spaced apart from the first waveguide by a first distance, and a heater disposed on the second waveguide and having a first terminal and a second terminal. In addition, the first terminal of the heater is configured to receive a first electrical signal; the second terminal of the heater is configured to receive a second electrical signal; and the heater is configured to carry a time-varying current in response to the first electrical signal and the second electrical signal.

Abstract: A semiconductor structure includes an optical die, a first edge coupler, and a reflective layer. The optical die has a top surface and an edge. The first edge coupler is disposed in the optical die and adjacent to the edge of the optical die. The reflective layer is disposed in the optical die and adjacent to the edge of the optical die. The reflective layer is disposed over the first edge coupler and separated from the first edge coupler.

Abstract: Some embodiments relate to an optical module including a substrate; a first grating coupler overlying the substrate; and a second grating coupler overlying the first grating coupler, where the second grating coupler is configured to receive a first transverse mode of an input optical signal while passing a second transverse mode of the input optical signal to the first grating coupler, and where the first grating coupler is configured to receive the second transverse mode of the input optical signal.

Abstract: A vertical grating coupler is disclosed. The grating coupler includes a first waveguide having a first grating, a second waveguide having a second grating, and a dielectric layer positioned between the first waveguide and the second waveguide. The first grating includes a plurality of first grating ridges separated by a plurality first grating gaps, and the second grating includes a plurality of second grating ridges separated by a plurality second grating gaps. The first grating, the second grating, and the dielectric layer are located in a vertical overlap region between the first waveguide and the second waveguide. The first grating and the second grating have different grating periods, and each of the plurality of first grating gaps and second grating gaps are filled with the dielectric layer.

Abstract: A semiconductor structure includes a plurality of semiconductor dies, a first stitch structure disposed in the plurality of semiconductor dies, and a second stitch structure disposed in at least two adjacent semiconductor dies of the plurality of semiconductor dies. The semiconductor dies are arranged to form a column or a row. The first stitch structure crosses all interfaces between the semiconductor dies. The second stitch structure crosses an interface between the at least two adjacent semiconductor dies.

Abstract: Disclosed are apparatus and methods for optical interconnections that include the integration of a photonics die (pDie) and an electronic die (eDie) with a socket layer, waveguides and fiber connectors to enable high bandwidth communications. In one embodiment, an exemplary optical interconnect device includes an electronic die coupled to a photonics die and integrated with a substrate, a socket, a board, a pair of micro-lenses and a mirror coupled to a waveguide, which can be embedded in the board. In another embodiment, the waveguide is embedded in a socket layer and coupled to a fiber connector. In these embodiments, the exemplary optical interface device can be coupled one more other optical interconnect devices via a waveguide array and/or a fiber array.

Abstract: A semiconductor structure includes: a first electrical waveguide formed of a first dielectric material and configured to transmit an electrical signal; a second electrical waveguide formed of the first dielectric material and disposed adjacent to a first side of the first electrical waveguide; and a third electrical waveguide formed of the first dielectric material and disposed adjacent to a second side of the first electrical waveguide opposite the first side. The second electrical waveguide and the third electrical waveguide are configured to form a composite waveguide together with the first electrical waveguide for transmission of the electrical signal.

Abstract: An interconnect package integrates a photonic die, an electronic die, and a switch ASIC into one package. At least some of the components in the electronic die, such as, for example, the serializer/deserializer circuits, transceivers, clocking circuitry, and/or control circuitry are integrated into the switch ASIC to produce an integrated switch ASIC. The photonic die is attached and electrically connected to the integrated switch ASIC.

Abstract: An exemplary package includes a photonic die, an electronic die, and a package component. The electronic die has an electronic device layer disposed between a frontside interconnect structure and a backside interconnect structure. The backside interconnect structure is configured to deliver power to the electronic device layer. The photonic die, the electronic die, and the package component are stacked top-to-bottom. The backside interconnect structure of the electronic die is connected to the package component, and the photonic die is connected to the electronic die. In some embodiments, the photonic die and the electronic die are each free of through semiconductor vias, such as through silicon vias. In some embodiments, a frontside interconnect structure of the photonic die is connected to the frontside interconnect structure of the electronic die. In some embodiments, a backside interconnect structure of the photonic die is connected to the frontside interconnect structure of the electronic die.

Abstract: An optical coupler includes: a plurality of waveguide core layers that are (i) stacked vertically one over another, (ii) spaced apart vertically one from another and (iii) extending from a light receiving end of the optical coupler longitudinally through the optical coupler to a light output end of the optical coupler, wherein each of the plurality of waveguide core layers includes a plurality of distinct waveguide paths extending from the light receiving end of the optical coupler along a length of the optical coupler; and a cladding formed from a cladding material cladding material surrounding each of the plurality of waveguide core layers. Light propagating within outer ones of the plurality of waveguide core layers is directed toward an interior one of the plurality of waveguide core layers via evanescent coupling between adjacent ones of the plurality of waveguide core layers.

Abstract: A method includes etching a silicon layer to form a silicon slab and an upper silicon region over the silicon slab, and implanting the silicon slab and the upper silicon region to form a p-type region, an n-type region, and an intrinsic region between the p-type region and the n-type region. The method further includes etching the p-type region, the n-type region, and the intrinsic region to form a trench. The remaining portions of the upper silicon region form a Multi-Mode Interferometer (MMI) region. An epitaxy process is performed to grow a germanium region in the trench. Electrical connections are made to connect to the p-type region and the n-type region.

Abstract: A method of characterizing a traveling-wave Mach-Zehnder modulator (TWMZM) includes measuring an electrooptic parameter, such as S21, of a test structure including a test TWMZM and a first instance of electrical pads which are connected to deliver a radio frequency (RF) signal to electrooptically modulate light traveling through the test TWMZM. The electrooptic parameter is similarly measured of a reference structure including a reference TWMZM and a second instance of the electrical pads which are connected to deliver the RF signal to electrooptically modulate light traveling through the reference TWMZM. A vestigial traveling-wave electrooptic phase modulator of the reference TWMZM is shorter than a traveling-wave electrooptic phase modulator of the test TWMZM. An electrooptic characteristic of the test TWMZM, such as S21 bandwidth, is determined by operations including subtracting the measured electrooptic S21 of the reference structure from the measured electrooptic S21 of the test structure.

Abstract: Integrated circuit (IC) devices include a metal-insulator-metal (MIM) capacitor having a top electrode plate, a bottom electrode plate, and a plurality of intermediate electrode plates between the top electrode plate and the bottom electrode plate. A plurality of dielectric layers may separate each of the electrode plates of the MIM capacitor from adjacent plates of the MIM capacitor. Each of the intermediate electrode plates may have a thickness that is greater than a thickness of the top electrode plate and the bottom electrode plate. By providing multiple intermediate electrode plates between the top and bottom electrode plates of the MIM capacitor, and allocating the greatest plate thicknesses to the intermediate plates, the capacitance density may be increased in a given area of the IC device, which may provide increased performance for the IC device.

Abstract: Optical devices, polarization rotators, and mode converters are provided. An optical device of the present disclosure includes a polarization rotator and a mode converter. The polarization rotator includes a straight waveguide segment having a first end and a second end, a first widening waveguide segment continuing from the second end, a first tapering waveguide segment continuing from the first widening waveguide segment, a second widening waveguide segment disposed over the first widening waveguide segment, and a second tapering waveguide segment continuing from the second widening waveguide segment. The mode converter includes a third tapering waveguide segment continuing from the second tapering waveguide segment, and a third widening waveguide segment disposed over the third tapering waveguide segment. An output end of the polarization rotator is coupled to an input end of the mode converter.

Abstract: An integrated circuit design method includes receiving an integrated circuit design, and determining a floor plan for the integrated circuit design. The floor plan includes an arrangement of a plurality of functional cells and a plurality of tap cells. Potential latchup locations in the floor plan are determined, and the arrangement of at least one of the functional cells or the tap cells is modified based on the determined potential latchup locations.

Abstract: In some embodiments, the present disclosure provides an optical module. A waveguide includes a rib, and further includes a first protrusion and a second protrusion respectively on opposite sides of the rib. Further, the waveguide is formed of a first semiconductor material. A photodetector is in the waveguide and comprises a PN junction in the rib. A P type region of the PN junction extends to the first protrusion, and an N type region of the PN junction extends to the second protrusion. Further, the first and second protrusions accommodate heavily doped P and N type contact regions. A semiconductor region is on the PN junction. The semiconductor region comprises a second semiconductor material different the first semiconductor material. For example, the second semiconductor material may have a smaller bandgap than the first semiconductor material to enhance quantum efficiency.

Abstract: Methods of fabricating optical devices with high refractive index materials are disclosed. The method includes forming a first oxide layer on a substrate and forming a patterned template layer with first and second trenches on the first oxide layer. A material of the patterned template layer has a first refractive index. The method further includes forming a first portion of a waveguide and a first portion of an optical coupler within the first and second trenches, respectively, forming a second portion of the waveguide and a second portion of the optical coupler on a top surface of the patterned template layer, and depositing a cladding layer on the second portions of the waveguide and optical coupler. The waveguide and the optical coupler include materials with a second refractive index that is greater than the first refractive index.

Abstract: A method includes etching a silicon layer to form a silicon slab and an upper silicon region over the silicon slab, and implanting the silicon slab and the upper silicon region to form a p-type region, an n-type region, and an intrinsic region between the p-type region and the n-type region. The method further includes etching the p-type region, the n-type region, and the intrinsic region to form a trench. The remaining portions of the upper silicon region form a Multi-Mode Interferometer (MMI) region. An epitaxy process is performed to grow a germanium region in the trench. Electrical connections are made to connect to the p-type region and the n-type region.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a test line structure disposed on a semiconductor workpiece. The test line structure includes a plurality of optical input/output (I/O) structures disposed within and/or on the semiconductor workpiece. The test line structure further includes a plurality of electrical I/O structures on the semiconductor workpiece. The plurality of optical I/O structures and the plurality of electric I/O structures are laterally spaced from one another along a line extending in a first direction.

Abstract: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. In one aspect, the semiconductor device includes a plurality of deep trench capacitors and a plurality of via contacts that at least partially surround the deep trench capacitors. Variations may be made to the number and locations of the plurality of via contacts such that design requirements for the packaging are satisfied.