Abstract: A stacked via structure (200) adapted to transmit high frequency signals or high intensity current through conductive layers of an electronic device carrier is disclosed. The stacked via structure comprises at least three conductive tracks (205a, 205b, 205c) belonging to three adjacent conductive layers (110a, 110b, 110c) separated by dielectric layers (120), aligned according to z axis. Connections between these conductive tracks are done with at least two vias (210, 215) between each conductive layer. Vias connected to one side of a conductive track are disposed such that they are not aligned with the ones connected to the other side according to z axis.

Abstract: A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane. Provided is also a method of producing the land grid array interposer structure.

Abstract: A power supply structure for high power circuit package is disclosed. According to the invention, the electrical connections between power planes are done through a plurality of coaxial structures that can be totally or partially implemented in the circuit shadow area of the electronic device carrier, for example under the engine area of the circuit. According to this principle, a same hole is used to transfer two different current levels, one on its periphery and the other one on its centre, doubling the electrical transfer capacity.

Abstract: Techniques for producing a flexible structure attached to a device. One embodiment includes the steps of providing a first substrate, providing a second substrate with a releasably attached flexible structure, providing a bonding layer on at least one of the first substrate and the flexible structure, adjoining the first and second substrate such that the flexible structure is attached at the first substrate by means of the bonding layer, and detaching the second substrate in such a way that the flexible structure remains on the first substrate.

Abstract: There is provided a method for measuring thermal properties of a semiconductor packaging material. The method includes incorporating at least one conducting feature into a substrate that includes the semiconductor packaging material, applying an electric current to the feature, and measuring a change in temperature of a region of the substrate around the feature as a result of the electric current. There is also provided a test vehicle for measuring thermal properties of a semiconductor packaging material.

Abstract: A tamper-proof cap adapted to be mounted on a large assembly for shielding a selected area of the large assembly is disclosed. The tamper-proof cap comprises a laminate stack-up structure wherein at least one open chamber is formed. The stack-up structure comprises at least two layers wherein tamper-proof layers are formed on top of the open chamber. A plurality of vias are disposed around the open chamber, forming with said tamper proof layers a tamper-proof structure around said open chamber. The vias are adapted for connecting the tamper-proof layers to the large assembly when the tamper-proof cap is mounted. In a preferred embodiment, the tamper-proof cap further comprises a shielding layer on top of the tamper-proof layer that are preferably done using conductive ink.

Abstract: A coaxial via structure is adapted to transmit high speed signals or high intensity current through conductive layers of an electronic device carrier. The coaxial via structure comprises a central conductive track and an external conductive track separated by a dielectric material and is positioned in a core of the electronic device carrier or in the full thickness of the electronic device. The coaxial via structure can be combined with a stacked via structure so as allow efficient transmission of high speed signals across the electronic device carrier when a manufacturing process limits the creation of a full coaxial via structure across the entire electronic device carrier.

Abstract: An electronic system comprising: an electronic system support substrate for the attachment of components of the electronic system, the electronic system support substrate including electric signal propagation paths for the propagation of electric signals between the system components; at least a first and a second electronic components wherein at least the first electronic component is part of a module in mechanical and electrical connection with the electronic system support substrate, the module comprising a module substrate to which the first electronic component is at least mechanically connected, and an electric coupling between the first and the second electronic components, for the electric coupling allowing the first and the second electronic components exchange of electric signals.

Abstract: A method and apparatus for handling and positioning half plated balls for socket application in ball grid array packages. The half plated balls, comprising a first side adapted to be soldered and a second side adapted to establish reliable solderless electrical contact, are embedded in a soft foil, with a common orientation. The soft foil is positioned on a clam-receiving tool and a vacuumed caved cover clam is fitted on the balls and then pushed to cut and separate the polymer sheet from the copper ball surface. The vacuumed caved cover clam is then lifted with the oriented copper balls entrapped inside and the vacuumed caved cover clam places the entrapped balls on the laminate pads, with a deposit of low melt alloy. The air vacuum is deactivated and the cover is lifted, leaving the balls positioned on the pads while the soldering process is initiated and solder joints are formed to fix the balls.

Abstract: A method for partially plating balls for application in ball grid array packages is disclosed. The balls are positioned in recesses of a clam tool made of two parts, such that a gap remains between these parts. A first polymer layer is formed in this gap and one part of the clam tool is thereafter removed. The resulting exposed portions of the balls are covered with a second polymer. The second part of the clam tool is removed and the resulting second exposed portions of the balls are plated with a noble metal, such as gold or palladium. After the balls have been partially plated, the second polymer is removed, leaving the partially plated balls embedded in the first polymer layer. The first polymer layer, preferably a soft foil, may be used to position the partially plated balls for attachment to an electronic module.

Abstract: An improved water soluble protective paste and a method for protecting metal circuits and pads on the surface of an electronic board during the manufacturing steps. A densifier is added to the paste making it easier and more efficient the dispensing of the paste. After deposition the layer is dried until a solid protective film is obtained. An additional advantage obtained by the present invention is that the protective layer can be deposited also by means of an offset printing process, avoiding the use of the stencil and of the screening steps. Screening process is a labourious operation which requires very sophisticated equipment and a very high precision in the design of the stencil. Because of these requirements, screening is an expensive process. On the other hand offset printing is a very simple, cheap and reliable method. In addition, the film forming properties allow the material to create a protective film even with a thin deposited film.

Abstract: An electro-optical module comprising flexible connection cable and aligning capabilities is disclosed. Electro-optical devices may be soldered on a transparent substrate such as glass or a substrate comprising an optical waveguide wherein electrically conductive traces are designed, forming an electro-optical module. When such electro-optical module is inserted and aligned into a printed circuit board, the external part of the substrate, comprising electrically conductive traces and pads, referred to as flex-cable, is bent down toward the mounting plane of the PCB allowing to establish electrical connections between these pads and the PCB. The substrate may be brokenalong a pre-formed groove, and the external part of the substrate can be removed leaving the flex-cable section in place.

Abstract: A method for embedding tamper proof layers and discrete components into a printed circuit board stack-up is disclosed. According to this method, a plating mask is applied on a base substrate to cover partially one of its faces. Conductive ink is then spread on this face so as to fill the gap formed by the plating mask. To obtain a uniform distribution of the conductive ink and then gel it, the conductive ink is preferably heated. A dielectric layer is applied on the conductive ink layer and the polymerization process is ended to obtain a strong adhesion between these two layers. In a preferred embodiment, conductive tracks are simultaneously designed on the other face of the base substrate to reduce thermo-mechanical strains and deformations.

Abstract: A method is provided for forming alloy deposits at selected areas on a receiving substrate, including providing a decal alloy carrier, having alloy loadable areas in selected positions thereof, the alloy loadable areas being adapted to being loaded with an alloy mass, mating the decal alloy carrier with the receiving substrate, so that the alloy loadable areas substantially correspond to the selected areas on the receiving substrate, and reflowing the solder alloy masses so as to cause transfer of the alloy from the alloy loadable areas to selected areas on the receiving substrate, such as solder-affine pads, while ensuring that the decal alloy carrier and the receiving substrate are kept in close contact one to another at least during the reflowing. The alloy loadable areas are preferrably recesses in the decal alloy carrier having flat bottoms, which results in relaxed alignment tolerances.

Abstract: A process for manufacturing printed wire boards with hard plated sliding contact tabs and soft plated wire bond pads. Sliding contact tabs are covered by a protective coating after being hard plated thus allowing the soft plating of wire bond pads without damaging the hard plated sliding contact tabs. In a preferred embodiment, the hard plating includes the step of electroplating nickel on the sliding contact tabs, followed by electroplating an alloy of gold and cobalt, using standard electroplating process. An electro-less soft plating process includes the steps of plating a nickel layer on the wire bond pads and then a gold layer after having “flash-etched” the copper seeding.

Abstract: A multi-layer module for packaging an electronic component comprises an uppermost electrically conductive layer for mounting the component, a plurality of electrically insulative layers, and a plurality of electrically conductive layers disposed between the insulative layers. The electrically conductive layers form staggered placements of at least three voltage and/or ground distribution layers close to the module surface without signal wiring layers in between, and signal distribution layers comprising signal conductors. Vias form conductive paths through the insulative layers and conductive layers; the corresponding signal, voltage and ground distribution layers are electrically connected with each other and with the uppermost layer.

Abstract: A multi-layer module for packaging an electronic component comprises an uppermost electrically conductive layer for mounting the component, a plurality of electrically insulative layers, and a plurality of electrically conductive layers disposed between the insulative layers. The electrically conductive layers form staggered placements of at least three voltage and/or ground distribution layers close to the module surface without signal wiring layers in between, and signal distribution layers comprising signal conductors. Vias form conductive paths through the insulative layers and conductive layers; the corresponding signal, voltage and ground distribution layers are electrically connected with each other and with the uppermost layer.

Abstract: A stacked via structure (200) adapted to transmit high frequency signals or high intensity current through conductive layers of an electronic device carrier is disclosed. The stacked via structure comprises at least three conductive tracks (205a, 205b, 205c) belonging to three adjacent conductive layers (110a, 110b, 110c) separated by dielectric layers (120), aligned according to z axis. Connections between these conductive tracks are done with at least two vias (210, 215) between each conductive layer. Vias connected to one side of a conductive track are disposed such that they are not aligned with the ones connected to the other side according to z axis. In a preferred embodiment, the shape of these aligned conductive tracks looks like a disk or an annular ring and four vias are used to connect two adjacent conductive layers. These four vias are symmetrically disposed on each of said conductive track.

Abstract: An improved water soluble protective paste and a method for protecting metal circuits and pads on the surface of an electronic board during the manufacturing steps. A densifier is added to the paste making it easier and more efficient the dispensing of the paste. After deposition the layer is dried until a solid protective film is obtained. An additional advantage obtained by the present invention is that the protective layer can be deposited also by means of an offset printing process, avoiding the use of the stencil and of the screening steps. Screening process is a labourious operation which requires very sophisticated equipment and a very high precision in the design of the stencil. Because of these requirements, screening is an expensive process. On the other hand offset printing is a very simple, cheap and reliable method. In addition, the film forming properties allow the material to create a protective film even with a thin deposited film.

Abstract: A Plastic Ball Grid Array electronic package of the Cavity Down type for use in HF application. The present invention allows to reduce the overall thickness of the package, by tailoring the different mechanical portions of the module structure (interconnection balls, grounded stiffener thickness). A thin dielectric layer is laid on a metal (e.g. copper) stiffener. A chip is attached on the same side of the dielectric layer and the electrical connections between the chip and the pads are done with metallic traces running on the surface of the dielectric layer. The external rows of balls are not connected to the circuit traces; they are electrically connected to the metal stiffener to realize the lateral shielding for the HF applications. The connection between the balls and the metal stiffener (which acts as the ground plane) is done by means of photovias. One of the more important aspects of the present invention is the dramatic reduction of the parasitic impedance.