Patents by Inventor Stefano S. Oggioni
Stefano S. Oggioni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10321589Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an enclosure, a tamper-detect sensor, a monitor, and a sensor connection adapter. The enclosure encloses, at least in part, one or more electronic components to be protected, and the tamper-detect sensor is disposed over an inner surface of the enclosure to facilitate defining a secure volume about the electronic component(s). The tamper-detect sensor includes sensor lines disposed over the inner surface of the enclosure, and the monitor monitors the tamper-detect sensor for a tamper event. The sensor connection adapter is coupled to the inner surface of the enclosure, and is disposed over the tamper-detect sensor within the secure volume. The sensor connection adapter facilitates electrically connecting the monitor to the sensor lines of the tamper-detect sensor.Type: GrantFiled: September 19, 2016Date of Patent: June 11, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Silvio Dragone, Stefano S. Oggioni, William Santiago-Fernandez
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Patent number: 10299372Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a multilayer circuit board, a tamper-detection sensor, and a vent structure. The tamper-detection sensor is embedded within the multilayer circuit board, and defines, at least in part, a secure volume associated with the multilayer circuit board. The vent structure is incorporated into the multilayer circuit board, and includes at least one vent channel. The vent channel(s) is in fluid communication with a space within the secure volume to facilitate venting the space of the secure volume. The space within the secure volume may accommodate, for instance, one or more electronic components to be protected, and the at least one vent channel may, for instance, allow air pressure within the space of the secure volume to equalize with air pressure external to the tamper-respondent assembly.Type: GrantFiled: September 26, 2016Date of Patent: May 21, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Silvio Dragone, Stefano S. Oggioni, William Santiago-Fernandez
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Patent number: 10271424Abstract: Vented tamper-respondent assemblies and methods of fabrication are provided which include a multilayer circuit board, a tamper-detection sensor, and an in situ vent structure. The tamper-detection sensor is embedded within the multilayer circuit board, and defines, at least in part, a secure volume associated with the multilayer circuit board. The in situ vent structure is formed within the multilayer circuit board, and includes at least one vent channel. The vent channel(s) is in fluid communication with a space within the secure volume to facilitate venting the space of the secure volume. The space within the secure volume may accommodate, for instance, one or more electronic components to be protected, and the at least one vent channel may, for instance, allow air pressure within the space of the secure volume to equalize with air pressure external to the tamper-respondent assembly.Type: GrantFiled: September 26, 2016Date of Patent: April 23, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Silvio Dragone, Stefano S. Oggioni, William Santiago-Fernandez
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Publication number: 20190049269Abstract: Electronic circuits, electronic packages, and methods of fabrication are provided. The electronic circuit includes a multilayer circuit board, and a tamper-respondent sensor embedded within the circuit board. The tamper-respondent sensor defines, at least in part, a secure volume associated with the multilayer circuit board. In certain implementations, the tamper-respondent sensor includes multiple tamper-respondent layers embedded within the circuit board including, for instance, one or more tamper-respondent frames and one or more tamper-respondent mat layers, with the tamper-respondent frame(s) being disposed, at least in part, above the tamper-respondent mat layer(s), which together define the secure volume where extending into the multilayer circuit board.Type: ApplicationFiled: October 17, 2018Publication date: February 14, 2019Inventors: William L. BRODSKY, Silvio DRAGONE, Roger S. KRABBENHOFT, David C. LONG, Stefano S. OGGIONI, Michael T. PEETS, William SANTIAGO-FERNANDEZ
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Publication number: 20190037707Abstract: The present invention is notably directed to a printed circuit board, or PCB. This PCB has two main surfaces, each delimited by lateral edges, as well as lateral surfaces, each meeting each of the two main surfaces at one lateral edge. The present PCB further comprises a row of solder pads, which extends along a lateral edge of the PCB. Each solder pad is formed directly at the lateral edge and/or directly on a lateral surface (meeting one of the two main surfaces at said lateral edge). I.e., each pad interrupts a lateral edge and/or an adjoining lateral surface. One or more chips, e.g., memory chips, can be mounted on such a PCB to form an IC package. The above solder pad arrangement allows particularly dense arrangements of IC packages to be obtained. The present invention is further directed to related devices and methods of fabrication thereof.Type: ApplicationFiled: October 3, 2018Publication date: January 31, 2019Inventors: Thomas Brunschwiler, Andreas Doering, Ronald P. Luijten, Stefano S. Oggioni, Joerg-Eric Sagmeister, Patricia M. Sagmeister, Martin Schmatz
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Publication number: 20190017844Abstract: Methods of fabricating electronic circuits and electronic packages are provided. The electronic circuit includes a multilayer circuit board, and a tamper-respondent sensor embedded within the circuit board. The tamper-respondent sensor defines, at least in part, a secure volume associated with the multilayer circuit board. In certain implementations, the tamper-respondent sensor includes multiple tamper-respondent layers embedded within the circuit board including, for instance, one or more tamper-respondent frames and one or more tamper-respondent mat layers, with the tamper-respondent frame(s) being disposed, at least in part, above the tamper-respondent mat layer(s), which together define the secure volume where extending into the multilayer circuit board.Type: ApplicationFiled: September 20, 2018Publication date: January 17, 2019Inventors: William L. BRODSKY, Silvio DRAGONE, Roger S. KRABBENHOFT, David C. LONG, Stefano S. OGGIONI, Michael T. PEETS, William SANTIAGO-FERNANDEZ
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Patent number: 10175064Abstract: Electronic circuits, electronic packages, and methods of fabrication are provided. The electronic circuit includes a multilayer circuit board, and a tamper-respondent sensor embedded within the circuit board. The tamper-respondent sensor defines, at least in part, a secure volume associated with the multilayer circuit board. In certain implementations, the tamper-respondent sensor includes multiple tamper-respondent layers embedded within the circuit board including, for instance, one or more tamper-respondent frames and one or more tamper-respondent mat layers, with the tamper-respondent frame(s) being disposed, at least in part, above the tamper-respondent mat layer(s), which together define the secure volume where extending into the multilayer circuit board.Type: GrantFiled: September 25, 2015Date of Patent: January 8, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William L. Brodsky, Silvio Dragone, Roger S. Krabbenhoft, David C. Long, Stefano S. Oggioni, Michael T. Peets, William Santiago-Fernandez
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Patent number: 10168185Abstract: Methods of fabricating electronic circuits and electronic packages are provided. The electronic circuit includes a multilayer circuit board, and a tamper-respondent sensor embedded within the circuit board. The tamper-respondent sensor defines, at least in part, a secure volume associated with the multilayer circuit board. In certain implementations, the tamper-respondent sensor includes multiple tamper-respondent layers embedded within the circuit board including, for instance, one or more tamper-respondent frames and one or more tamper-respondent mat layers, with the tamper-respondent frame(s) being disposed, at least in part, above the tamper-respondent mat layer(s), which together define the secure volume where extending into the multilayer circuit board.Type: GrantFiled: November 16, 2015Date of Patent: January 1, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William L. Brodsky, Silvio Dragone, Roger S. Krabbenhoft, David C. Long, Stefano S. Oggioni, Michael T. Peets, William Santiago-Fernandez
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Patent number: 10098241Abstract: The present invention is notably directed to a printed circuit board, or PCB. This PCB has two main surfaces, each delimited by lateral edges, as well as lateral surfaces, each meeting each of the two main surfaces at one lateral edge. The present PCB further comprises a row of solder pads, which extends along a lateral edge of the PCB. Each solder pad is formed directly at the lateral edge and/or directly on a lateral surface (meeting one of the two main surfaces at said lateral edge). I.e., each pad interrupts a lateral edge and/or an adjoining lateral surface. One or more chips, e.g., memory chips, can be mounted on such a PCB to form an IC package. The above solder pad arrangement allows particularly dense arrangements of IC packages to be obtained. The present invention is further directed to related devices and methods of fabrication thereof.Type: GrantFiled: October 23, 2015Date of Patent: October 9, 2018Assignee: International Business Machines CorporationInventors: Thomas Brunschwiler, Andreas Doering, Ronald P. Luijten, Stefano S. Oggioni, Joerg-Eric Sagmeister, Patricia Sagmeister, Martin Schmatz
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Publication number: 20180248511Abstract: The present invention is notably directed to a photovoltaic module, or PV module, comprising an array of photovoltaic cells, or PV cells, and electrical interconnects. The array of PV cells comprises N portions, N?2, where the portions comprise, each, disjoint sets of PV cells of the array. The electrical interconnects connect the PV cells and the N portions of the array so as for PV cells within each of said portions to be electrically connected in parallel and the N portions to be connected in series. The PV cells and the portions are connected, via said interconnects, so to output an electrical current, in operation. The electrical interconnects are otherwise configured to provide electrical signals from each of the N portions. The invention is further directed to related systems and methods of fabrication and operation.Type: ApplicationFiled: February 27, 2017Publication date: August 30, 2018Inventors: Emanuel Loertscher, Bruno Michel, Stefano S. Oggioni, Stephan Paredes, Patrick Ruch, Mauro Spreafico, Giorgio Viero
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Publication number: 20180248512Abstract: The present invention is notably directed to a photovoltaic module, or PV module, comprising an array of photovoltaic cells, or PV cells, and electrical interconnects. The array of PV cells comprises N portions, N?2, where the portions comprise, each, disjoint sets of PV cells of the array. The electrical interconnects connect the PV cells and the N portions of the array so as for PV cells within each of said portions to be electrically connected in parallel and the N portions to be connected in series. The PV cells and the portions are connected, via said interconnects, so to output an electrical current, in operation. The electrical interconnects are otherwise configured to provide electrical signals from each of the N portions. The invention is further directed to related systems and methods of fabrication and operation.Type: ApplicationFiled: November 1, 2017Publication date: August 30, 2018Inventors: Emanuel Loertscher, Bruno Michel, Stefano S. Oggioni, Stephan Paredes, Patrick Ruch, Mauro Spreafico, Giorgio Viero
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Publication number: 20180228028Abstract: The invention relates to a method for embedding a discrete electronic device in a chip module. The chip module comprises a multilayer substrate which comprises a plurality of electrically conductive layers stacked above each other and an electrically non-conductive layer arranged between each pair of electrically conductive layers. The chip module is configured to receive one or more chips to be mounted onto a top surface thereof. Each electrically conductive layer comprises one or more electrically conductive structures. A recess is provided in a side surface of the chip module. The discrete electronic device is inserted into the recess. A first electrically conductive connection between a first electrical contact of the discrete electronic device and a first electrically conductive structure is established. Further, a second electrically conductive connection between a second electrical contact of the discrete electronic device and a second electrically conductive structure is established.Type: ApplicationFiled: April 5, 2018Publication date: August 9, 2018Inventors: Andreas Huber, Harald Huels, Stefano S. Oggioni, Thomas Strach, Thomas-Michael Winkel
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Publication number: 20180204430Abstract: Manufacturing a batch is provided which includes a plurality of items of an electronic device, the items including a plurality of corresponding main modules having a same functional structure substantially identical for the items. The method includes defining at least one security electric circuit, of an enclosure component for enclosing each item, adapted to protect the item from tampering, the security electric circuits having individual configurations substantially different among the items, for use in forming the security electric circuit with the corresponding configuration on each enclosure component. Additionally, the method includes determining one or more electric characteristics of each security electric circuit for use in configuring a monitoring circuit of the corresponding main module, the monitoring circuit being adapted to the corresponding security electric circuit for detecting the tampering, according to the electric characteristics of the corresponding security circuits.Type: ApplicationFiled: March 15, 2018Publication date: July 19, 2018Inventors: Silvio DRAGONE, Christoph HAGLEITNER, Stefano S. OGGIONI
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Patent number: 10008081Abstract: Manufacturing a batch is provided which includes a plurality of items of an electronic device, the items including a plurality of corresponding main modules having a same functional structure substantially identical for the items. The method includes defining at least one security electric circuit, of an enclosure component for enclosing each item, adapted to protect the item from tampering, the security electric circuits having individual configurations substantially different among the items, for use in forming the security electric circuit with the corresponding configuration on each enclosure component. Additionally, the method includes determining one or more electric characteristics of each security electric circuit for use in configuring a monitoring circuit of the corresponding main module, the monitoring circuit being adapted to the corresponding security electric circuit for detecting the tampering, according to the electric characteristics of the corresponding security circuits.Type: GrantFiled: November 21, 2016Date of Patent: June 26, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Silvio Dragone, Christoph Hagleitner, Stefano S. Oggioni
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Patent number: 9980385Abstract: The invention relates to a method for embedding a discrete electronic device in a chip module. The chip module comprises a multilayer substrate which comprises a plurality of electrically conductive layers stacked above each other and an electrically non-conductive layer arranged between each pair of electrically conductive layers. The chip module is configured to receive one or more chips to be mounted onto a top surface thereof. Each electrically conductive layer comprises one or more electrically conductive structures. A recess is provided in a side surface of the chip module. The discrete electronic device is inserted into the recess. A first electrically conductive connection between a first electrical contact of the discrete electronic device and a first electrically conductive structure is established. Further, a second electrically conductive connection between a second electrical contact of the discrete electronic device and a second electrically conductive structure is established.Type: GrantFiled: April 24, 2017Date of Patent: May 22, 2018Assignee: International Business Machines CorporationInventors: Andreas Huber, Harald Huels, Stefano S. Oggioni, Thomas Strach, Thomas-Michael Winkel
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Publication number: 20180092203Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a multilayer circuit board, a tamper-detection sensor, and a vent structure. The tamper-detection sensor is embedded within the multilayer circuit board, and defines, at least in part, a secure volume associated with the multilayer circuit board. The vent structure is incorporated into the multilayer circuit board, and includes at least one vent channel. The vent channel(s) is in fluid communication with a space within the secure volume to facilitate venting the space of the secure volume. The space within the secure volume may accommodate, for instance, one or more electronic components to be protected, and the at least one vent channel may, for instance, allow air pressure within the space of the secure volume to equalize with air pressure external to the tamper-respondent assembly.Type: ApplicationFiled: September 26, 2016Publication date: March 29, 2018Inventors: Silvio DRAGONE, Stefano S. OGGIONI, William SANTIAGO-FERNANDEZ
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Publication number: 20180092204Abstract: Vented tamper-respondent assemblies and methods of fabrication are provided which include a multilayer circuit board, a tamper-detection sensor, and an in situ vent structure. The tamper-detection sensor is embedded within the multilayer circuit board, and defines, at least in part, a secure volume associated with the multilayer circuit board. The in situ vent structure is formed within the multilayer circuit board, and includes at least one vent channel. The vent channel(s) is in fluid communication with a space within the secure volume to facilitate venting the space of the secure volume. The space within the secure volume may accommodate, for instance, one or more electronic components to be protected, and the at least one vent channel may, for instance, allow air pressure within the space of the secure volume to equalize with air pressure external to the tamper-respondent assembly.Type: ApplicationFiled: September 26, 2016Publication date: March 29, 2018Inventors: Silvio DRAGONE, Stefano S. OGGIONI, William SANTIAGO-FERNANDEZ
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Publication number: 20180082556Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an enclosure, a tamper-detect sensor, a monitor, and a sensor connection adapter. The enclosure encloses, at least in part, one or more electronic components to be protected, and the tamper-detect sensor is disposed over an inner surface of the enclosure to facilitate defining a secure volume about the electronic component(s). The tamper-detect sensor includes sensor lines disposed over the inner surface of the enclosure, and the monitor monitors the tamper-detect sensor for a tamper event. The sensor connection adapter is coupled to the inner surface of the enclosure, and is disposed over the tamper-detect sensor within the secure volume. The sensor connection adapter facilitates electrically connecting the monitor to the sensor lines of the tamper-detect sensor.Type: ApplicationFiled: September 19, 2016Publication date: March 22, 2018Inventors: Silvio DRAGONE, Stefano S. OGGIONI, William SANTIAGO-FERNANDEZ
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Publication number: 20180027659Abstract: The invention relates to a method for embedding a discrete electronic device in a chip module. The chip module comprises a multilayer substrate which comprises a plurality of electrically conductive layers stacked above each other and an electrically non-conductive layer arranged between each pair of electrically conductive layers. The chip module is configured to receive one or more chips to be mounted onto a top surface thereof. Each electrically conductive layer comprises one or more electrically conductive structures. A recess is provided in a side surface of the chip module. The discrete electronic device is inserted into the recess. A first electrically conductive connection between a first electrical contact of the discrete electronic device and a first electrically conductive structure is established. Further, a second electrically conductive connection between a second electrical contact of the discrete electronic device and a second electrically conductive structure is established.Type: ApplicationFiled: April 24, 2017Publication date: January 25, 2018Inventors: Andreas Huber, Harald Huels, Stefano S. Oggioni, Thomas Strach, Thomas-Michael Winkel
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Publication number: 20180012459Abstract: Manufacturing a batch is provided which includes a plurality of items of an electronic device, the items including a plurality of corresponding main modules having a same functional structure substantially identical for the items. The method includes defining at least one security electric circuit, of an enclosure component for enclosing each item, adapted to protect the item from tampering, the security electric circuits having individual configurations substantially different among the items, for use in forming the security electric circuit with the corresponding configuration on each enclosure component. Additionally, the method includes determining one or more electric characteristics of each security electric circuit for use in configuring a monitoring circuit of the corresponding main module, the monitoring circuit being adapted to the corresponding security electric circuit for detecting the tampering, according to the electric characteristics of the corresponding security circuits.Type: ApplicationFiled: November 21, 2016Publication date: January 11, 2018Inventors: Silvio DRAGONE, Christoph HAGLEITNER, Stefano S. OGGIONI