Patents by Inventor Steffen Bieselt

Steffen Bieselt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160104625
    Abstract: Embodiments relate to integrated circuit sensors, and more particularly to sensors integrated in an integrated circuit structure and methods for producing the sensors.
    Type: Application
    Filed: October 13, 2014
    Publication date: April 14, 2016
    Inventors: Thoralf Kautzsch, Heiko Fröhlich, Mirko Vogt, Maik Stegemann, Andre Röth, Steffen Bieselt
  • Patent number: 9263357
    Abstract: According to various embodiments, a carrier may include: a hollow chamber spaced apart from a surface of the carrier; and at least one support structure within the hollow chamber connecting a first region of the carrier disposed over the hollow chamber with a second region of the carrier disposed below the hollow chamber, wherein at least a part of a surface of the at least one support structure is spaced apart from an inner surface of the hollow chamber, and wherein the at least one support structure includes an electrically insulating material.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: February 16, 2016
    Assignee: INFINEON TECHNOLOGIES DRESDEN GMBH
    Inventor: Steffen Bieselt
  • Patent number: 9236241
    Abstract: According to various embodiments, a method for processing a wafer may include: forming at least one hollow chamber and a support structure within the wafer, the at least one hollow chamber defining a cap region of the carrier located above the at least one hollow chamber and a bottom region of the carrier located below the at least one hollow chamber and an edge region surrounding the cap region of the carrier, wherein a surface area of the cap region is greater than a surface area of the edge region, and wherein the cap region is connected to the bottom region by the support structure; removing the cap region in one piece from the bottom region and the edge region.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: January 12, 2016
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Thoralf Kautzsch, Alessia Scire, Steffen Bieselt, Uwe Rudolph, Marco Mueller, Boris Binder
  • Publication number: 20150375999
    Abstract: A method for manufacturing a micromechanical system is shown. The method comprises the steps of forming in a front end of line (FEOL) process a transistor in a transistor region. After the FEOL process, a protective layer is deposited in the transistor region, wherein the protective layer comprises an isolating material, e.g. an oxide. A structured sacrificial layer is formed at least in a region which is not the transistor region. Furthermore, a functional layer is formed which is at least partially covering the structured sacrificial layer. After the functional layer is formed removing the sacrificial layer in order to create a cavity between the functional layer and a surface, where the sacrificial layer was deposited on. The protective layer protects the transistor from being damaged especially during etching processes in further processing steps in MOL (middle of line) and BEOL (back end of line) processes.
    Type: Application
    Filed: April 27, 2015
    Publication date: December 31, 2015
    Inventors: Thoralf Kautzsch, Heiko Froehlich, Mirko Vogt, Maik Stegemann, Boris Binder, Steffen Bieselt
  • Publication number: 20150340268
    Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate. The method further includes forming a first pillar within the first cavity to support the portion of the substrate.
    Type: Application
    Filed: August 6, 2015
    Publication date: November 26, 2015
    Inventors: Thoralf Kautzsch, Alessia Scire, Steffen Bieselt
  • Publication number: 20150332956
    Abstract: According to a method in semiconductor device fabrication, a first trench and a second trench are concurrently etched in a semi-finished semiconductor device. The first trench is a mechanical decoupling trench between a first region of an eventual semiconductor device and a second region thereof. The method further includes concurrently passivating or insulating sidewalls of the first trench and of the second trench. A related semiconductor device includes a first trench configured to provide a mechanical decoupling between a first region and a second region of the semiconductor device. The semiconductor device further includes a second trench and a sidewall coating at sidewalls of the first trench and the second trench. The sidewall coating at the sidewalls of the first trench and at the sidewalls of the second trench are of the same material.
    Type: Application
    Filed: May 14, 2014
    Publication date: November 19, 2015
    Inventors: Steffen Bieselt, Dirk Meinhold
  • Publication number: 20150318166
    Abstract: According to various embodiments, a method for processing a wafer may include: forming at least one hollow chamber and a support structure within the wafer, the at least one hollow chamber defining a cap region of the carrier located above the at least one hollow chamber and a bottom region of the carrier located below the at least one hollow chamber and an edge region surrounding the cap region of the carrier, wherein a surface area of the cap region is greater than a surface area of the edge region, and wherein the cap region is connected to the bottom region by the support structure; removing the cap region in one piece from the bottom region and the edge region.
    Type: Application
    Filed: May 5, 2014
    Publication date: November 5, 2015
    Applicant: Infineon Technologies Dresden GmbH
    Inventors: Thoralf KAUTZSCH, Alessia SCIRE, Steffen BIESELT, Uwe RUDOLPH, Marco MUELLER, Boris BINDER
  • Patent number: 9136328
    Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate. The method further includes forming a first pillar within the first cavity to support the portion of the substrate.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: September 15, 2015
    Assignee: Infineon Technologies Dresden GMBH
    Inventors: Thoralf Kautzsch, Alessia Scire, Steffen Bieselt
  • Publication number: 20150163915
    Abstract: According to various embodiments, an electronic device may include a carrier including at least a first region and a second region being laterally adjacent to each other; an electrically insulating structure arranged in the first region of the carrier, wherein the second region of the carrier is free of the electrically insulating structure; a first electronic component arranged in the first region of the carrier over the electrically insulating structure; a second electronic component arranged in the second region of the carrier; wherein the electrically insulating structure includes one or more hollow chambers, wherein the sidewalls of the one or more hollow chambers are covered with an electrically insulating material.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 11, 2015
    Applicant: Infineon Technologies Dresden GmbH
    Inventors: Thoralf Kautzsch, Alessia Scire, Steffen Bieselt, Franz Hirler, Anton Mauder, Wolfgang Scholz, Hans-Joachim Schulze, Francisco Javier Santos Rodriguez
  • Publication number: 20150162253
    Abstract: According to various embodiments, a carrier may be provided, the carrier including: a hollow chamber spaced apart from a surface of the carrier; a trench structure extending from the surface of the carrier to the hollow chamber and laterally surrounding a first region of the carrier, the trench structure including one or more trenches extending from the surface of the carrier to the hollow chamber, and one or more support structures intersecting the one or more trenches and connecting the first region of the carrier with a second region of the carrier outside the trench structure, wherein the one or more support structures including an electrically insulating material.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 11, 2015
    Applicant: Infineon Technologies Dresden GmbH
    Inventor: Steffen Bieselt
  • Publication number: 20150162254
    Abstract: According to various embodiments, a carrier may include: a hollow chamber spaced apart from a surface of the carrier; and at least one support structure within the hollow chamber connecting a first region of the carrier disposed over the hollow chamber with a second region of the carrier disposed below the hollow chamber, wherein at least a part of a surface of the at least one support structure is spaced apart from an inner surface of the hollow chamber, and wherein the at least one support structure includes an electrically insulating material.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 11, 2015
    Applicant: Infineon Technologies Dresden GmbH
    Inventor: Steffen Bieselt
  • Publication number: 20140097521
    Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate. The method further includes forming a first pillar within the first cavity to support the portion of the substrate.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Applicant: INFINEON TECHNOLOGIES DRESDEN GMBH
    Inventors: Thoralf Kautzsch, Alessia Scire, Steffen Bieselt