Abstract: An electronic system in package, including at least: a support; one or more chips mechanically and electrically coupled to a front face of the support; an encapsulation material covering the front face of the support and encapsulating the chip(s); several side protection elements, comprising an opaque material and laterally surrounding the chip(s) and configured to form a barrier at least against laser attacks made through side faces of the electronic system in package that are substantially perpendicular to the front face of the support; and wherein the side protection elements are disposed in the encapsulation material or in one or more first blocks of material distinct from the support and disposed in the encapsulation material.

Abstract: A method for detecting an attack by electromagnetic waves on an electronic chip or system-in-package type device including an attack detection element comprising a GMI-effect electrically-conductive material, including: a) demagnetising the GMI-effect material such that the value of its remanent magnetisation is equal to a predefined value lower than the value of its maximum remanent magnetisation, b) determining a first value of the impedance of the attack detection element, then c) after a time period during which the device might have undergone an attack, measuring a second value of the impedance of the attack detection element by circulating in the GMI-effect electrically-conductive material an alternating current with the same frequency as when determining the first impedance value, d) comparing the first and second values of the impedance of the attack detection element.

Abstract: An electronic chip includes at least an electronic circuit disposed on a front face of a substrate; and an embrittlement structure comprising at least blind holes, each extending through a rear face of the substrate and a portion of the thickness of the substrate and each having a section, in a plane parallel to the rear face of the substrate, of surface area S and having a closed outer contour, the shape of which includes at least one radius of curvature R, such that S>?·R2.

Abstract: Electronic chip comprising: an electronic circuit; a resistive element arranged on a rear face of a substrate; two conductive vias passing through the substrate, each connected to the electronic circuit and to one of the ends of the resistive element, and masked by the resistive element; and comprising a weakening structure formed of blind holes such that each of the blind holes comprises a section, at the rear face, of shape and of external dimensions similar to those of the conductive vias, and comprises a portion of the substrate masked by the resistive element, or in which the resistive element comprises first and second parts spaced apart from each other, arranged one above the other, electrically connected to each other and together forming a coil pattern and/or several alternating, intermingled, wound up or intertwined patterns.

Abstract: An electronic system in package, including at least: a support; one or more chips mechanically and electrically coupled to a front face of the support; an encapsulation material covering the front face of the support and encapsulating the chip(s); several side protection elements, comprising an opaque material and laterally surrounding the chip(s) and configured to form a barrier at least against laser attacks made through side faces of the electronic system in package that are substantially perpendicular to the front face of the support; and wherein the side protection elements are disposed in the encapsulation material or in one or more first blocks of material distinct from the support and disposed in the encapsulation material.

Abstract: Device of the chip or electronic system-in-package type, comprising at least one element for protecting at least part of at least one face of the device, said protective element comprising at least: an attack detection element of the device comprising at least one GMI-effect electrically conductive material, and a magnetic field emitter to which said GMI-effect electrically conductive material is to be subjected, and wherein the GMI effect is to be achieved in said GMI-effect electrically conductive material when an exciting alternating electric current flows therethrough and when subjected to the magnetic field of the magnetic field emitter.

Abstract: An electronic chip includes at least an electronic circuit disposed on a front face of a substrate; and an embrittlement structure comprising at least blind holes, each extending through a rear face of the substrate and a portion of the thickness of the substrate and each having a section, in a plane parallel to the rear face of the substrate, of surface area S and having a closed outer contour, the shape of which includes at least one radius of curvature R, such that S>?·R2.

Abstract: An electronic circuit including a semiconducting or conducting substrate having first and second opposite surfaces and at least first and second non-parallel electrically insulating trenches that extend from the first surface in the substrate, define at least one portion of the substrate and join at a junction, the portion of the substrate including a protrusion that extends to the junction.

Abstract: Electronic chip comprising: an electronic circuit; a resistive element arranged on a rear face of a substrate; two conductive vias passing through the substrate, each connected to the electronic circuit and to one of the ends of the resistive element, and masked by the resistive element; and comprising a weakening structure formed of blind holes such that each of the blind holes comprises a section, at the rear face, of shape and of external dimensions similar to those of the conductive vias, and comprises a portion of the substrate masked by the resistive element, or in which the resistive element comprises first and second parts spaced apart from each other, arranged one above the other, electrically connected to each other and together forming a coil pattern and/or several alternating, intermingled, wound up or intertwined patterns.

Abstract: An electronic circuit including a semiconducting or conducting substrate having first and second opposite surfaces and at least first and second non-parallel electrically insulating trenches that extend from the first surface in the substrate, define at least one portion of the substrate and join at a junction, the portion of the substrate including a protrusion that extends to the junction.

Abstract: A method of making connection elements for a microelectronic device is provided, including foil ling a conducting layer on a support on which there is at least one conducting pad located on a front face of the support opposite a back face thereof, the conducting layer including a first conducting portion in contact with at least one conducting pad, the first conducting portion extending on the front face and being connected to at least one second conducting portion extending in contact with at least one given wall of the support being located between the front and back faces and forming a non-zero angle with the front face; thinning the support at the back face to release one conducting end of the second conducting portion as a free conducting end projecting from the back face; and after the thinning, bending the free conducting end projecting from the back face.

Abstract: An electronic chip and a method of making thereof is provided, where the electronic chip includes at least: an electronic circuit arranged at a front face of a substrate; a first protective layer arranged on a rear face of the substrate; a resistive element arranged on the first protective layer and facing at least one part of the electronic circuit, mechanically supported by the first protective layer and connected electrically and/or in an inductive manner to the electronic circuit; a second protective layer covering at least the resistive element; and in which the first protective layer comprises at least one dielectric material having a resistance to chemical etching by at least one chemical etching agent less than or equal to that of a dielectric material of the second protective layer.

Abstract: Method for making one or several connection elements projecting from the back face of a support and each connected to one or several conducting pads located on the front face of the support, the front face being opposite the back face, the method including steps of: forming a conducting layer on the support, the conducting layer being arranged such that it comprises a first conducting portion in contact with at least one conducting pad located on the front face, the first conducting portion extending on the front face and being connected to at least one second conducting portion extending in contact with at least one given wall of the support, the wall being located between the front face and the back face and making a non-zero angle with the front face of the support, thinning the support at its back face so as to release one end of the second conducting portion from the support, this free conducting portion, this free conducting portion projecting beyond the back edge of the support.

Abstract: Electronic chip comprising at least: an electronic circuit arranged at a front face of a substrate; a first protective layer arranged on a rear face of the substrate; a resistive element arranged on the first protective layer and facing at least one part of the electronic circuit, mechanically supported by the first protective layer and connected electrically and/or in an inductive manner to the electronic circuit; a second protective layer covering at least the resistive element; and in which the first protective layer comprises at least one dielectric material having a resistance to chemical etching by at least one chemical etching agent less than or equal to that of a dielectric material of the second protective layer.

Abstract: The fabrication of a semiconductor fixed structure defining a volume, for example of a MEMS micro electro-mechanical system includes, determining thicknesses beforehand depending on the functional distances associated with elements. At least one element is formed on a substrate by thermal oxidation of the substrate so as to form an oxide layer followed by selective etching of the oxide layer so as to define the volume in an etched portion by baring the underlying substrate so as to define the element in an unetched portion, and later oxidation of the substrate so as to form an oxide layer, in order to obtain the elements at the functional distances.

Abstract: A method of etching a sacrificial layer for a micro-machined structure, the sacrificial layer positioned between a layer of a first material and a layer of a second material, the etching being carried out by an etching agent. The method includes: providing at least one species having an affinity for the etching agent greater than that of the layers of first material and second material and less than or equal to that of the sacrificial layer; and then etching the sacrificial layer by the etching agent, the etching being carried out to eliminate at least partially the sacrificial layer and then to eliminate at least partially the species.

Abstract: The disclosure concerns a microelectronic device provided with one or more <<quantum wires>>, able to form one or more transistor channels, and optimized in terms of arrangement, shape or/and composition. The invention also uses a method for fabricating said device, comprising the steps of: the forming, in one or more thin layers resting on a support, of a first block and a second block in which at least one transistor drain region and at least one transistor source region are respectively intended to be formed, and of a structure connecting the first block to the second block, and the forming, on the surface of the structure, of wires connecting a first region of the first block with another region of the second block which faces the first region.

Abstract: The fabrication of a semiconductor fixed structure defining a volume, for example of a MEMS micro electro-mechanical system includes, determining thicknesses beforehand depending on the functional distances associated with elements. At least one element is formed on a substrate by thermal oxidation of the substrate so as to form an oxide layer followed by selective etching of the oxide layer so as to define the volume in an etched portion by baring the underlying substrate so as to define the element in an unetched portion, and later oxidation of the substrate so as to form an oxide layer, in order to obtain the elements at the functional distances.

Abstract: The disclosure concerns a microelectronic device provided with one or more <<quantum wires>>, able to form one or more transistor channels, and optimized in terms of arrangement, shape or/and composition. The invention also uses a method for fabricating said device, comprising the steps of: the forming, in one or more thin layers resting on a support, of a first block and a second block in which at least one transistor drain region and at least one transistor source region are respectively intended to be formed, and of a structure connecting the first block to the second block, and the forming, on the surface of the structure, of wires connecting a first region of the first block with another region of the second block which faces the first region.

Abstract: A microelectronic device provided with one or more quantum wires, able to form one or more transistor channels, and optimized in terms of arrangement, shape, and/or composition. A method for fabricating the device includes forming, in one or more thin layers resting on a support, a first block and a second block in which at least one transistor drain region and at least one transistor source region are respectively intended to be formed, forming a structure connecting the first block to the second block, and forming, on the surface of the structure, wires connecting a first region of the first block with another region of the second block that faces the first region.