Abstract: A method is described in which a contact hole (18) to an interconnect (14) in an insulating layer (16) is fabricated. A barrier layer (20) is subsequently applied. Afterward, a photoresist layer (30) is applied, irradiated and developed. With the aid of a galvanic method, a copper contact (32) is then produced in the contact hole (18). Either the barrier layer (20) or an additional boundary electrode layer (22) serves as a boundary electrode in the galvanic process. Critical metal contaminations are minimized in production.

Abstract: An integrated circuit includes a substrate including a contact pad, a redistribution line coupled to the contact pad, and a dielectric material layer between the substrate and the redistribution line. The integrated circuit includes a solder ball coupled to the redistribution line and a parylene material layer sealing the dielectric material layer and the redistribution line.

Abstract: A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also includes an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer. In the molding compound a contact via is arranged.

Abstract: The invention relates to an arrangement of electronic semiconductor components on a carrier system for treating the semiconductor components with a liquid medium. A semiconductor component is detachably mounted on the carrier system with the active side thereof in such a way that the arrangement comprises a gap at least in the edge region and partially between the semiconductor components and the carrier system. The aim of the invention is to provide a detachable arrangement of electronic semiconductor components on a mechanically stable carrier system for safely handling the semiconductor components during the production process, wherein the capillarity of the gap between the semiconductor components and the carrier system is reduced in a controlled manner, thus preventing the damaging effect of a liquid medium seeping into the gap. To this end, the surface of the carrier system is shaped in such a way that the gap is widened along the entire edge region thereof.

Abstract: A semiconductor device is disclosed. One embodiment provides an arrangement of a plurality of semiconductor chips arranged side by side in a spaced apart relationship. A first material fills at least partly the spacings between adjacent semiconductor chips. A second material is arranged over the semiconductor chips and the first material. A coefficient of thermal expansion of the first material is selected to adapt the lateral thermal expansion of the arrangement in a plane intersecting the first material and the semiconductor chips to the lateral thermal expansion of the arrangement in a plane intersecting the second material.

Abstract: The invention relates to an arrangement of electronic semiconductor components on a carrier system for treating the semiconductor components with a liquid medium. A semiconductor component is detachably mounted on the carrier system with the active side thereof in such a way that the arrangement comprises a gap at least in the edge region and partially between the semiconductor components and the carrier system. The aim of the invention is to provide a detachable arrangement of electronic semiconductor components on a mechanically stable carrier system for safely handling the semiconductor components during the production process, wherein the capillarity of the gap between the semiconductor components and the carrier system is reduced in a controlled manner, thus preventing the damaging effect of a liquid medium seeping into the gap. To this end, the surface of the carrier system is shaped in such a way that the gap is widened along the entire edge region thereof.

Abstract: An integrated circuit includes a substrate including a contact pad, a redistribution line coupled to the contact pad, and a dielectric material layer between the substrate and the redistribution line. The integrated circuit includes a solder ball coupled to the redistribution line and a parylene material layer sealing the dielectric material layer and the redistribution line.

Abstract: A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer. In the molding compound a contact via is arranged.

Abstract: A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer.

Abstract: A semiconductor wafer with rear side identification and to a method for producing the same is disclosed. In one embodiment, the rear side identification has a multiplicity of information regarding the monocrystalline and surface and also rear side constitution. A multiplicity of semiconductor device positions arranged in rows and columns are provided on the top side of the semiconductor wafer, an information chip being arranged at an exposed semiconductor device position, the information chip having at least the information of the rear side identification.

Abstract: A workpiece machining method includes attaching a workpiece to a workpiece support with the aid of joining means. The workpiece and the workpiece support are joined to one another by an annular joining means. The composite produced is machined. The machined workpiece is separated from the workpiece support.

Abstract: The invention relates to an arrangement of electronic semiconductor components on a carrier system for treating the semiconductor components with a liquid medium. A semiconductor component is detachably mounted on the carrier system with the active side thereof in such a way that the arrangement comprises a gap at least in the edge region and partially between the semiconductor components and the carrier system. The aim of the invention is to provide a detachable arrangement of electronic semiconductor components on a mechanically stable carrier system for safely handling the semiconductor components during the production process, wherein the capillarity of the gap between the semiconductor components and the carrier system is reduced in a controlled manner, thus preventing the damaging effect of a liquid medium seeping into the gap. To this end, the surface of the carrier system is shaped in such a way that the gap is widened along the entire edge region thereof.

Abstract: A method is described in which a contact hole (18) to an interconnect (14) in an insulating layer (16) is fabricated. A barrier layer (20) is subsequently applied. Afterward, a photoresist layer (30) is applied, irradiated and developed. With the aid of a galvanic method, a copper contact (32) is then produced in the contact hole (18). Either the barrier layer (20) or an additional boundary electrode layer (22) serves as a boundary electrode in the galvanic process. Critical metal contaminations are minimized in production.

Abstract: The electrical characteristic of a microelectronic circuit configuration that has at least one analog electronic unit is set. In a configuration step, by feeding and/or extracting electrical charge, the analog electronic unit is put into a state which permanently determines the analog electrical characteristics of the unit. In particular, the floating gate of an EEPROM cell is charged up to a freely selectable charge value lying within a continuous range.

Abstract: The polishing agent of the invention has polishing grains suspended in a solution. The polishing grains consist essentially of a first substance with a glass transition temperature TG, and the polishing grains contain a dopant. The concentration of the dopant is set so that the glass transition temperature TG′ of the doped substance is lower than the glass transition temperature TG of the undoped first substance. The polishing agent is advantageously used for the microscratch-free planarization of a semiconductor substrate or of layers applied on it.

Abstract: A method and an apparatus for detecting the presence of a work piece in an automatic processing apparatus are described. Previously known detection devices cannot make a clear distinction between the presence and absence of the work piece under all conditions. An apparatus is therefore provided which contains an ultrasound transmitter, an ultrasound receiver and a detection device (controller). The detection as to whether a work piece is held in a holder in the processing apparatus is carried out by irradiating the holder with ultrasound waves, receiving the reflected ultrasound waves and detecting on the basis of the reflected ultrasound waves. The method can be used advantageously in particular in polishing machines for wafers, where the polishing cloth is distinguished considerably, in terms of its acoustic reflection capacity, from the wafer to be polished.

Abstract: The electrical characteristics of a microelectronic circuit configuration that has at least one analog electronic unit is set. In a configuration step, by feeding and/or extracting electrical charge, the analog electronic unit is put into a state which permanently determines the analog electrical characteristics of the unit. In particular, the floating gate of an EEPROM cell is charged up to a freely selectable charge value lying within a continuous range.

Abstract: A method for forming a trench structure in a silicon substrate, which trench structure serves for electrically insulating a first region of the substrate from a second substrate region. The method proceeds from a growth of a thermal oxide layer on the substrate surface and an application and patterning of a mask layer over the thermal oxide layer. A trench of predetermined depth is subsequently etched into the silicon substrate through the patterned mask layer. The trench is filled by a deposition of a conformal covering oxide layer on the substrate with an essentially uniform thickness that is sufficient for completely filling the trench. Afterwards, a polysilicon layer is deposited on the covering oxide layer and a chemical mechanical planarization method is carried out with high selectivity S between the polysilicon material and the oxide material in order to obtain a flat surface.

Abstract: A method and an apparatus apply a substance, especially a developer, to a surface through jets. Each jet carries the substance to be applied to a predetermined portion of the surface, and each jet essentially applies a predetermined quantity of substance per unit of surface area, wherein at least one jet applies a maximum quantity of substance per unit of surface area to the surface. The quantity of substance per unit of surface area applied by each jet is selected in such a way that it is greater than 1% of the maximum quantity of substance per unit of surface area.

Abstract: A device for end-point monitoring used in the polishing of components, in particular semiconductor components. The device has a textile structure, which may be constructed as a cloth or a pad, and is used to accommodate a component that is to be monitored. The textile-like structure has a windowless construction. The textile structure may be disposed on a platen. Furthermore, a light source, preferably a laser, for emitting a monochromatic red light beam having a preferred wavelength of approximately 800 nm is provided. The red light beam is directed through the textile structure onto the component to be monitored. In addition, a detector is used to detect the red light beam reflected by the component to be monitored. The end-point monitoring may, for example, be carried out by interferometry. In addition, a corresponding method is also described.