Abstract: The present invention relates to a method for depositing a dielectric material comprising a transition metal compound. After providing a substrate, a first pre-cursor comprising a transition metal compound and a second pre-cursor predominantly comprising at least one of water vapour, ammonia and hydrazine are successively applied on the substrate for forming a first layer of transition metal containing material. In a next step the first pre-cursor and a third pre-cursor comprising at least one of ozone and oxygen are successively applied on the first layer for forming a second layer of the transition metal containing material.

Abstract: One embodiment relates to an integrated circuit that includes a conductive line that is arranged in a groove in a semiconductor body. An insulating material is disposed over the conductive line. This insulating material includes a first insulating layer comprising a horizontal portion, and a second insulating layer that is disposed over the first insulating layer. Other methods, devices, and systems are also disclosed.

Abstract: In a method for producing a conductive layer a substrate is provided. On the substrate, a layer includes at least two different metal nitrides. In one embodiment, on a surface of the substrate a first metal nitride layer is deposited, followed by a second metal nitride layer formed thereon. A third metal layer is then deposited on a surface of the second metal nitride layer.

Abstract: A method produces stacked capacitors for dynamic memory cells, in which a number of trenches (48) are formed in the masking layer (40), each trench (48) being arranged above a respective contact plug (26) and extending from the top (42) of the masking layer (40) to the contact plugs (26). A conductive layer (50) covers the side walls (49) of the trenches (48) and the contact plugs (26) in order to form a first electrode (60) of a stacked capacitor (12). In an upper region (63), which is remote from the contact stack (26), the conductive layer (50) is replaced by an insulating layer, so that it is not possible for a short circuit to arise in the event of any adhesion between adjacent electrodes.

Abstract: The present invention relates to a method for depositing a dielectric material comprising a transition metal oxide. In an initial step, a substrate is provided. In a further step, a first precursor comprising a transition metal containing compound, and a second precursor predominantly comprising at least one of water vapor, ozone, oxygen, or oxygen plasma are sequentially applied for depositing above the substrate a layer of a transition metal containing material. In another step, a third precursor comprising a dopant containing compound, and a fourth precursor predominantly comprising at least one of water vapor, ozone, oxygen, or oxygen plasma are sequentially applied for depositing above the substrate a layer of a dopant containing material. The transition metal comprises at least one of zirconium and hafnium. The dopant comprises at least one of barium, strontium, calcium, niobium, bismuth, magnesium, and cerium.

Abstract: The present invention relates to a deposition of a dielectric layer. On a substrate having a structured area a crystallization seed layer for a dielectric layer is deposited via an atomic layer deposition technique employing a first and a second precursor on the structured area of the substrate. The first pre-cursor is a compound having the constitutional formula M1(R1Cp)x(R2)4-x, wherein M1 is one of hafnium and zirconium, Cp is cyclopentadienyl, R1 is independently selected of methyl, ethyl and alkyl, R2 is independently selected of hydrogen, methyl, ethyl, alkyl and alkoxyl, and x is one or two. The dielectric layer is deposited on the crystallization seed layer via an atomic layer deposition technique employing a third and a forth precursor wherein the third pre-cursor being a compound having the constitutional formula M2 R3 R4 R5 R6, wherein M2 is one of hafnium or zirconium and R3, R4, R5, and R6 are independently selected of alkyl amines.

Abstract: The invention relates to a deposition method performing the following steps. A substrate is provided which is structured to comprise a first surface and a second surface, which differ in at least one of geometric orientation and vertical distance to a principle surface of the substrate. An etchable layer is deposited on the first surface via an atomic layer deposition technique the deposition technique using a first precursor supplied in an amount sufficient to cover at least parts of the first surface and insufficient to cover the second surface, the first precursor being supplied from a direction to pass the first surface before the second surface. A dielectric layer of at least one of a transition metal oxide and a transition metal nitride is deposited on at least the second surface via an atomic layer deposition technique using a second precursor.

Abstract: The present invention relates to a method for depositing a dielectric material comprising a transition metal compound. After providing a substrate, a first pre-cursor comprising a transition metal compound and a second pre-cursor predominantly comprising at least one of water vapour, ammonia and hydrazine are successively applied on the substrate for forming a first layer of transition metal containing material. In a next step the first pre-cursor and a third pre-cursor comprising at least one of ozone and oxygen are successively applied on the first layer for forming a second layer of the transition metal containing material.

Abstract: The present invention relates to a method of fabricating a capacitor in a semiconductor substrate. The capacitor is fabricated such that the capacitor comprises: a trench inside a substrate, the trench having a lower region and an upper region, wherein the trench's diameters in the lower region is larger than in the upper region; a first electrode; a dielectric layer on top of the first electrode; a conductive layer on top of the electric layer, the conductive layer forming a second electrode of the capacitor; and a plug forming a closed cavity inside the lower region.

Abstract: The present invention relates to a manufacturing method for a trench capacitor having an isolation collar which is electrically connected with a substrate on a single side via a buried contact. More specifically, the present invention relates to manufacturing method for a trench capacitor having an isolation collar with a metal conductive fill in the collar region connected to a metal fill in the capacitor region.

Abstract: A storage capacitor, particularly for use in a storage cell, exhibits two storage electrodes and a dielectric arranged between the two storage electrodes, an intermediate layer essentially consisting of carbon.

Abstract: Fabricating a trench capacitor with an insulation collar in a substrate, which is electrically connected thereto on one side through a buried contact, in particular, for a semiconductor memory cell with a planar selection transistor in the substrate and connected through the buried contact, includes providing a trench using an opening in a hard mask, providing a capacitor dielectric in lower and central trench regions, the collar in central and upper trench regions, and a conductive filling at least as far as the insulation collar topside, completely filling the trench with a filling material, carrying out STI trench fabrication process, removing the filling material and sinking the filling to below the collar topside, forming an insulation region on one side above the collar; uncovering a connection region on a different side above the collar, and forming the buried contact by depositing and etching back a metallic filling.

Abstract: A method produces stacked capacitors for dynamic memory cells, in which a number of trenches (48) are formed in the masking layer (40), each trench (48) being arranged above a respective contact plug (26) and extending from the top (42) of the masking layer (40) to the contact plugs (26). A conductive layer (50) covers the side walls (49) of the trenches (48) and the contact plugs (26) in order to form a first electrode (60) of a stacked capacitor (12). In an upper region (63), which is remote from the contact stack (26), the conductive layer (50) is replaced by an insulating layer, so that it is not possible for a short circuit to arise in the event of any adhesion between adjacent electrodes.

Abstract: A method for fabricating a trench structure, in particular a trench capacitor with an insulation collar, which is electrically connected to a substrate on one side via a buried contact. Fabrication includes, for example, providing a trench in the substrate using a hard mask with a corresponding mask opening; providing an at least partial trench filling; providing a liner on the resulting structure; carrying out an oblique implantation of impurity ions onto the liner for altering the etching properties of an implanted partial region of the liner; selectively removing the implanted partial region of the liner by a first etching for forming a liner mask from the complimentary partial region of the liner, which partially masks the top side of the trench filling; removing a part of the trench filling by a second etching using the liner mask; and replacing the removed part of the trench filling.

Abstract: The present invention relates to a method of fabricating a capacitor in a semiconductor substrate. The capacitor is fabricated such that the capacitor comprises: a trench inside a substrate, the trench having a lower region and an upper region, wherein the trench's diameters in the lower region is larger than in the upper region; a first electrode; a dielectric layer on top of the first electrode; a conductive layer on top of the electric layer, the conductive layer forming a second electrode of the capacitor; and a plug forming a closed cavity inside the lower region.

Abstract: A trench capacitor with improved strap is disclosed. The strap is located above the top surface of the capacitor. The top surface of the trench capacitor, which is formed by the top surfaces of the collar and storage plate, is planar. By locating the strap on a planar surface, the divot present in conventional strap processes is avoided. This results in improved strap reliability and device performance.

Abstract: A dielectric barrier layer composed of a metal oxide is applied in thin layers with a thickness of less than 20 nanometers in the course of processing semiconductor devices by sequential gas phase deposition or molecular beam epitaxy in molecular individual layers on differently structured base substrates. The method allows, inter alias, effective conductive diffusion barriers to be formed from a dielectric material, an optimization of the layer thickness of the barrier layer, an increase in the temperature budget for subsequent process steps, and a reduction in the effort for removing the temporary barrier layers.

Abstract: The surface area of the walls of a trench formed in a substrate is increased. A barrier layer is formed on the walls of the trench such that the barrier layer is thinner near the corners of the trench and is thicker between the corners of the trench. A dopant is introduced into the substrate through the barrier layer to form higher doped regions in the substrate near the corners of the trench and lesser doped regions between the corners of the trench. The barrier layer is removed, and the walls of the trench are etched in a manner that etches the lesser doped regions of the substrate at a higher rate than the higher doped regions of the substrate to widen and lengthen the trench and to form rounded corners at the intersections of the walls of the trench.

Abstract: The present invention provides a method for expanding a trench in a semiconductor structure. A trench is provided in a semiconductor substrate, hydrogen-terminated silicon surfaces are provided in the trench, anisotropic wet etching of the silicon surfaces in the trench with an alkaline etchant occur, and the trench is rinsed with a proton-containing neutralizing agent for the removal of the alkaline etchant. Between the wet etching step and the rinsing step, an anodic passivation of the etched silicon surfaces in the trench is carried out, in the course of which an etching stop layer is formed on the etched silicon surfaces in the trench.

Abstract: The present invention relates to a manufacturing method for a trench capacitor having an isolation collar which is electrically connected with a substrate on a single side via a buried contact, particularly for use in a semiconductor memory cell. More specifically, the present invention relates to a manufacturing method for a trench capacitor having an isolation collar with a metal conductive fill in the collar region connected to a metal fill in the capacitor region.