Patents by Inventor Stephan Stoeckl

Stephan Stoeckl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200328182
    Abstract: An embedded-bridge substrate connector apparatus includes a patterned reference layer to which a first module and a subsequent module are aligned and the two modules are mated at the patterned reference layer. At least one module includes a silicon bridge connector that bridges to two devices, through the patterned reference layer, to the mated module.
    Type: Application
    Filed: June 29, 2020
    Publication date: October 15, 2020
    Inventors: Bernd WAIDHAS, Georg SEIDEMANN, Andreas WOLTER, Thomas WAGNER, Stephan Stoeckl, Laurent MILLOU
  • Patent number: 10727197
    Abstract: An embedded-bridge substrate connector apparatus includes a patterned reference layer to which a first module and a subsequent module are aligned and the two modules are mated at the patterned reference layer. At least one module includes a silicon bridge connector that bridges to two devices, through the patterned reference layer, to the mated module.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: July 28, 2020
    Assignee: Intel IP Corporation
    Inventors: Bernd Waidhas, Georg Seidemann, Andreas Wolter, Thomas Wagner, Stephan Stoeckl, Laurent Millou
  • Publication number: 20200144723
    Abstract: A patch antenna array is fabricated with a package-on-package setup that contains a transceiver. The patch antenna array has a footprint that intersects the transceiver footprint. The package-on-package setup includes through-mold vias that couple to a redistribution layer disposed between the patch antennas and the package-on-package setup.
    Type: Application
    Filed: March 31, 2017
    Publication date: May 7, 2020
    Inventors: Andreas Augustin, Sonja Koller, Bernd Waidhas, Georg Seidemann, Andreas Wolter, Stephan Stoeckl, Thomas Wagner, Josef Hagn
  • Publication number: 20190341371
    Abstract: A semiconductive device stack, includes a baseband processor die with an active surface and a backside surface, and a recess in the backside surface. A recess-seated device is disposed in the recess, and a through-silicon via in the baseband processor die couples the baseband processor die at the active surface to the recess-seated die at the recess. A processor die is disposed on the baseband processor die backside surface, and a memory die is disposed on the processor die. The several dice are coupled by through-silicon via groups.
    Type: Application
    Filed: July 18, 2019
    Publication date: November 7, 2019
    Inventors: Bernd Waidhas, Georg Seidemann, Andreas Augustin, Laurent Millou, Andreas Wolter, Reinhard Mahnkopf, Stephan Stoeckl, Thomas Wagner
  • Patent number: 10403602
    Abstract: A semiconductive device stack, includes a baseband processor die with an active surface and a backside surface, and a recess in the backside surface. A recess-seated device is disposed in the recess, and a through-silicon via in the baseband processor die couples the baseband processor die at the active surface to the recess-seated die at the recess. A processor die is disposed on the baseband processor die backside surface, and a memory die is disposed on the processor die. The several dice are coupled by through-silicon via groups.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: September 3, 2019
    Assignee: Intel IP Corporation
    Inventors: Bernd Waidhas, Georg Seidemann, Andreas Augustin, Laurent Millou, Andreas Wolter, Reinhard Mahnkopf, Stephan Stoeckl, Thomas Wagner
  • Publication number: 20190103347
    Abstract: A system and method for aligning components is disclosed. A system arranges a plurality of components in a first component alignment. The system places two L-shaped fine placement tools in a position surrounding the plurality of components, wherein the L-shaped fine placement tools include a plurality of pins. The system applies a force to the pins included in the two L-shaped fine placement tools to shift the plurality of components from the first component alignment to a second component alignment, wherein the second component alignment has less unused space than the first component alignment. The system removes the two L-shaped fine placement tools. The system attaches the plurality of components to a carrier arranged in the second component alignment.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Inventors: Georg Seidemann, Andreas Wolter, Stephan Stoeckl, Thomas Wagner
  • Publication number: 20190004083
    Abstract: Techniques for an integrated circuit including an accelerometer are provided. In an example, an apparatus can include a unitary silicon substrate including a first portion and a second portion, wherein the first portion is thinner than the second portion, at least a portion of a sensor circuit configured to measure a deflection of the second portion with respect to the first portion, wherein the first portion is configured to anchor the accelerometer to a second device, and wherein the second portion is configured to deflect relative to the first portion in response to acceleration of the apparatus.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Inventors: Sonja Koller, Bernd Waidhas, Georg Seidemann, Stephan Stoeckl
  • Publication number: 20190006318
    Abstract: A semiconductive device stack, includes a baseband processor die with an active surface and a backside surface, and a recess in the backside surface. A recess-seated device is disposed in the recess, and a through-silicon via in the baseband processor die couples the baseband processor die at the active surface to the recess-seated die at the recess. A processor die is disposed on the baseband processor die backside surface, and a memory die is disposed on the processor die. The several dice are coupled by through-silicon via groups.
    Type: Application
    Filed: June 29, 2017
    Publication date: January 3, 2019
    Inventors: Bernd Waidhas, Georg Seidemann, Andreas Augustin, Laurent Millou, Andreas Wolter, Reinhard Mahnkopf, Stephan Stoeckl, Thomas Wagner
  • Patent number: 10141265
    Abstract: A bent-bridge semiconductive apparatus includes a silicon bridge that is integral to a semiconductive device and the silicon bridge is deflected out of planarity. The silicon bridge may couple two semiconductive devices, all of which are from an integral processed die.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: November 27, 2018
    Assignee: Intel IP Corporation
    Inventors: Bernd Waidhas, Stephan Stoeckl, Andreas Wolter, Reinhard Mahnkopf, Georg Seidemann, Thomas Wagner, Laurent Millou
  • Publication number: 20180277512
    Abstract: An embedded-bridge substrate connector apparatus includes a patterned reference layer to which a first module and a subsequent module are aligned and the two modules are mated at the patterned reference layer. At least one module includes a silicon bridge connector that bridges to two devices, through the patterned reference layer, to the mated module.
    Type: Application
    Filed: March 21, 2017
    Publication date: September 27, 2018
    Inventors: Bernd Waidhas, Georg Seidemann, Andreas Wolter, Thomas Wagner, Stephan Stoeckl, Laurent Millou
  • Publication number: 20180190589
    Abstract: A bent-bridge semiconductive apparatus includes a silicon bridge that is integral to a semiconductive device and the silicon bridge is deflected out of planarity. The silicon bridge may couple two semiconductive devices, all of which are from an integral processed die.
    Type: Application
    Filed: December 29, 2016
    Publication date: July 5, 2018
    Inventors: Bernd Waidhas, Stephan Stoeckl, Andreas Wolter, Reinhard Mahnkopf, Georg Seidemann, Thomas Wagner, Laurent Millou
  • Patent number: 9368461
    Abstract: Disclosed herein are contact pads for use with integrated circuit (IC) packages. In some embodiments, a contact pad disclosed herein may be disposed on a substrate of an IC package, and may include a metal projection portion and a metal recess portion. Each of the metal projection portion and the metal recess portion may have a solder contact surface. The solder contact surface of the metal recess portion may be spaced away from the solder contact surface of the metal projection portion. Related devices and techniques are also disclosed herein, and other embodiments may be claimed.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: June 14, 2016
    Assignee: INTEL CORPORATION
    Inventors: Sven Albers, Georg Seidemann, Sonja Koller, Stephan Stoeckl, Shubhada H. Sahasrabudhe, Sandeep B. Sane
  • Patent number: 9299672
    Abstract: Disclosed herein are contact pads for use with integrated circuit (IC) packages. In some embodiments, a contact pad disclosed herein may be disposed on a substrate of an IC package, and may include a metal projection portion and a metal recess portion. Each of the metal projection portion and the metal recess portion may have a solder contact surface. The solder contact surface of the metal recess portion may be spaced away from the solder contact surface of the metal projection portion. Related devices and techniques are also disclosed herein, and other embodiments may be claimed.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: March 29, 2016
    Assignee: INTEL CORPORATION
    Inventors: Sven Albers, Georg Seidemann, Sonja Koller, Stephan Stoeckl, Shubhada H. Sahasrabudhe, Sandeep B. Sane
  • Publication number: 20150333022
    Abstract: Disclosed herein are contact pads for use with integrated circuit (IC) packages. In some embodiments, a contact pad disclosed herein may be disposed on a substrate of an IC package, and may include a metal projection portion and a metal recess portion. Each of the metal projection portion and the metal recess portion may have a solder contact surface. The solder contact surface of the metal recess portion may be spaced away from the solder contact surface of the metal projection portion. Related devices and techniques are also disclosed herein, and other embodiments may be claimed.
    Type: Application
    Filed: May 16, 2014
    Publication date: November 19, 2015
    Inventors: Sven Albers, Georg Seidemann, Sonja Koller, Stephan Stoeckl, Shubhada H. Sahasrabudhe, Sandeep B. Sane
  • Patent number: 7709936
    Abstract: The invention relates to a module comprising a carrier element having a lower stiffness or a different structure in a first region than in a second region, and also comprising a component applied to the carrier element. The component and the first region are connected to one another by a wire connection covered by a material.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: May 4, 2010
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Stephan Stoeckl
  • Patent number: 7602614
    Abstract: An electronic module and a method for the production thereof is disclosed. In one embodiment, the electronic module has a plurality of components arranged on a wiring block. The wiring block has a plurality of outer sides and has in its volume lines interconnecting contact pads on the outer sides. The contact pads are electrically connected to component connections of the components.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: October 13, 2009
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Wolfram Eurskens, Rudolf Kerler, Heinz Pape, Peter Strobel, Stephan Stoeckl
  • Publication number: 20080112141
    Abstract: The invention relates to a module comprising a carrier element having a lower stiffness or a different structure in a first region than in a second region, and also comprising a component applied to the carrier element. The component and the first region are connected to one another by a wire connection covered by a material.
    Type: Application
    Filed: December 20, 2006
    Publication date: May 15, 2008
    Inventors: Michael Bauer, Stephan Stoeckl
  • Publication number: 20060250781
    Abstract: An electronic module and a method for the production thereof is disclosed. In one embodiment, the electronic module has a plurality of components arranged on a wiring block. The wiring block has a plurality of outer sides and has in its volume lines interconnecting contact pads on the outer sides. The contact pads are electrically connected to component connections of the components.
    Type: Application
    Filed: June 4, 2004
    Publication date: November 9, 2006
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Michael Bauer, Wolfram Eurskens, Rudolf Kerter, Heinz Pape, Peter Strobe, Stephan Stoeckl
  • Publication number: 20060088954
    Abstract: An electronic component and a method for fabricating it is disclosed, where the component comprises a semiconductor chips which has flip-chip contacts. These contacts are fixed on a rewiring substrate, the interspace between the rewiring substrate and the semiconductor chip being filled with a thermoplastic. The glass transition temperature of the thermoplastic is above the highest operating test temperature of the component and below the melting temperature of the solder material for external contacts.
    Type: Application
    Filed: October 20, 2003
    Publication date: April 27, 2006
    Inventors: Michael Bauer, Christian Birzer, Gerald Ofner, Stephan Stoeckl
  • Patent number: 6940156
    Abstract: An electronic module contains a semiconductor chip that has flexible chip contacts. The flexible chip contacts are disposed on an uppermost metallization layer and have a dimensionally stable contact plate which is connected to contact surfaces on the uppermost metallization layer via electrically conductive components in an elastomeric embedding compound.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: September 6, 2005
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Christian Birzer, Gerald Ofner, Stephan Stoeckl