Patents by Inventor Stephan Vogt

Stephan Vogt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180284992
    Abstract: A computing system includes a host processor, an access processor having a command port, a near memory accelerator, and a memory unit. The system is adapted to run a software program on the host processor and to offload an acceleration task of the software program to the near memory accelerator. The system is further adapted to provide, via the command port, a first communication path for direct communication between the software program and the near memory accelerator, and to provide, via the command port and the access processor, a second communication path for indirect communication between the software program and the near memory accelerator. A related computer implemented method and a related computer program product are also disclosed.
    Type: Application
    Filed: March 28, 2017
    Publication date: October 4, 2018
    Inventors: Angelo Haller, Harald Huels, Jan Van Lunteren, Joerg-Stephan Vogt
  • Publication number: 20180284994
    Abstract: A computing system includes a host processor, an access processor having a command port, a near memory accelerator, and a memory unit. The system is adapted to run a software program on the host processor and to offload an acceleration task of the software program to the near memory accelerator. The system is further adapted to provide, via the command port, a first communication path for direct communication between the software program and the near memory accelerator, and to provide, via the command port and the access processor, a second communication path for indirect communication between the software program and the near memory accelerator. A related computer implemented method and a related computer program product are also disclosed.
    Type: Application
    Filed: December 30, 2017
    Publication date: October 4, 2018
    Inventors: Angelo Haller, Harald Huels, Jan Van Lunteren, Joerg-Stephan Vogt
  • Publication number: 20170341694
    Abstract: A drinking bottle cage includes a fastening member for fastening to a bicycle frame. The fastening member has connected therewith, in particular integrally formed with, a bottom holding member and a fixing member. The bottom holding member includes a projection in particular configured as a pin, said projection engaging with a recess provided at the bottom of the drinking bottle when the drinking bottle is fixed.
    Type: Application
    Filed: May 23, 2017
    Publication date: November 30, 2017
    Inventors: Stephan Vogt, Sebastian Hahn
  • Patent number: 9715539
    Abstract: A hardware accelerator receives a request to decompress a data stream that includes multiple deflate blocks and multiple deflate elements compressed according to block-specific compression configuration information. The hardware accelerator identifies a commit point that is based upon an interruption of a first decompression session of the data stream and corresponds to one of the deflate blocks. As such, the hardware accelerator configures a decompression engine based upon the corresponding deflate block's configuration information and, in turn, recommences decompression of the data stream at an input bit location corresponding to the commit point.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: July 25, 2017
    Assignee: International Business Machines Corporation
    Inventors: Kanak B. Agarwal, Damir A. Jamsek, Andrew K. Martin, Reiner Rieke, Joerg-Stephan Vogt, Gunnar von Boehn
  • Publication number: 20170134041
    Abstract: A computer program product for data compression is provided. The computer program product includes a computer readable storage medium having program instructions embodied therewith. The program instructions are readable and executable by a processing circuit to cause the processing circuit to execute software compression for first requests for data compression that have respective sizes below a predefined threshold, forward second requests for data compression having respective sizes above the predefined threshold to a hardware accelerator and maintain a persistence of a compression dictionary used for executing the second requests across executions of the first and second requests.
    Type: Application
    Filed: March 17, 2016
    Publication date: May 11, 2017
    Inventors: Frank Haverkamp, Anthony T. Sofia, Joerg-Stephan Vogt
  • Publication number: 20170132241
    Abstract: A computer program product for data compression is provided. The computer program product includes a computer readable storage medium having program instructions embodied therewith. The program instructions are readable and executable by a processing circuit to cause the processing circuit to execute software compression for first requests for data compression that have respective sizes below a predefined threshold, forward second requests for data compression having respective sizes above the predefined threshold to a hardware accelerator and maintain a persistence of a compression dictionary used for executing the second requests across executions of the first and second requests.
    Type: Application
    Filed: November 11, 2015
    Publication date: May 11, 2017
    Inventors: Frank Haverkamp, Anthony T. Sofia, Joerg-Stephan Vogt
  • Patent number: 9575657
    Abstract: A method of dataset replica migration is described. An application session may start on a first compute node. A first replica of the dataset to be accessed by the application session may be located on a second compute node. A second replica of the dataset is created to be co-located with the first compute node. A first data block of the dataset may be requested by the application session. The first data block of the first replica of the dataset may be read from the second compute node, when the second replica does not have a copy of the first data block stored in the second replica. The retrieved first data block may be copied to the second replica. The first data block may be read from the second replica, when the first data block is requested by the application session and is contained in the second replica.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: February 21, 2017
    Assignee: International Business Machines Corporation
    Inventors: Oliver Benke, Jan Kunigk, Stefan Letz, Joerg-Stephan Vogt
  • Patent number: 9569108
    Abstract: A method of dataset replica migration is described. An application session may start on a first compute node. A first replica of the dataset to be accessed by the application session may be located on a second compute node. A second replica of the dataset is created to be co-located with the first compute node. A first data block of the dataset may be requested by the application session. The first data block of the first replica of the dataset may be read from the second compute node, when the second replica does not have a copy of the first data block stored in the second replica. The retrieved first data block may be copied to the second replica. The first data block may be read from the second replica, when the first data block is requested by the application session and is contained in the second replica.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: February 14, 2017
    Assignee: International Business Machines Corporation
    Inventors: Oliver Benke, Jan Kunigk, Stefan Letz, Joerg-Stephan Vogt
  • Patent number: 9559857
    Abstract: A preprocessing unit includes a data receiver to receive a data packet containing packet information, application data, and application data information, a relevance checker to determine relevance of the data packet in dependence on the packet information, an output module to output preprocessor output data, and a first controller to control output of preprocessor output data in dependence on the relevance of the data packet. In order to discard redundant data, thereby reducing the load of the memory, bus, and CPU of the computer system, the preprocessing unit further comprises a redundancy checker to determine redundancy of the application data preferably and a second controller to control output of preprocessor output data in dependence on the redundancy of the application data.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: January 31, 2017
    Assignee: International Business Machines Corporation
    Inventors: Gunnar Von Boehn, Reiner Rieke, Joerg-Stephan Vogt
  • Patent number: 9455742
    Abstract: An output sequence of data elements is processed. The output sequence of data elements represents a sequence of input data elements in a compressed format. An output data element includes a backward reference for each string in the input data elements that occurs again in an input data element that is used to produce the output data element. A backward reference identified in a selected output data element is used for selecting the string to which it refers in the stored input data elements. The selected string is combined with strings of one or more subsequent output data elements. A matching sequence in the stored input data elements matching at least part of one or more combined strings is found. A combined string of the one or more combined strings having the longest matching sequence is selected. The backward reference is redefined to indicate the longest matching sequence.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: September 27, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas Fuchs, Christian Jacobi, Anthony T. Sofia, Joerg-Stephan Vogt
  • Patent number: 9419646
    Abstract: Concurrently writing an uncompressed data element, if the uncompressed data element comprises an indication that it is valid, in a main hash table using a first address generated by a first hash function, and reading a first data element from the main hash table using the first address. Introducing a first pipeline delay for maintaining the uncompressed data element in a first data path until the first data element is read. Concurrently writing the first data element to a victim hash table, if the first data element comprises an indication that it is valid, using a second address generated by a second hash function, and reading a second data element from the victim hash table using a third address generated by the second hash function. Introducing a second pipeline delay for maintaining the uncompressed data element in the first data path until the second data element is read.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: August 16, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas Fuchs, Christian Jacobi, Reiner Rieke, Joerg-Stephan Vogt
  • Publication number: 20160233882
    Abstract: An approach is provided in which a hardware accelerator receives a request to decompress a data stream that includes multiple deflate blocks and multiple deflate elements compressed according to block-specific compression configuration information. The hardware accelerator identifies a commit point that is based upon an interruption of a first decompression session of the data stream and corresponds to one of the deflate blocks. As such, the hardware accelerator configures a decompression engine based upon the corresponding deflate block's configuration information and, in turn, recommences decompression of the data stream at an input bit location corresponding to the commit point.
    Type: Application
    Filed: April 15, 2016
    Publication date: August 11, 2016
    Inventors: Kanak B. Agarwal, Damir A. Jamsek, Andrew K. Martin, Reiner Rieke, Joerg-Stephan Vogt, Gunnar von Boehn
  • Patent number: 9391791
    Abstract: A preprocessing unit includes a data receiver to receive a data packet containing packet information, application data, and application data information, a relevance checker to determine relevance of the data packet in dependence on the packet information, an output module to output preprocessor output data, and a first controller to control output of preprocessor output data in dependence on the relevance of the data packet. In order to discard redundant data, thereby reducing the load of the memory, bus, and CPU of the computer system, the preprocessing unit further comprises a redundancy checker to determine redundancy of the application data preferably and a second controller to control output of preprocessor output data in dependence on the redundancy of the application data.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: July 12, 2016
    Assignee: International Business Machines Corporation
    Inventors: Gunnar Von Boehn, Reiner Rieke, Joerg-Stephan Vogt
  • Patent number: 9374106
    Abstract: A hardware accelerator receives a request to decompress a data stream that includes multiple deflate blocks and multiple deflate elements compressed according to block-specific compression configuration information. The hardware accelerator identifies a commit point that is based upon an interruption of a first decompression session of the data stream and corresponds to one of the deflate blocks. As such, the hardware accelerator configures a decompression engine based upon the corresponding deflate block's configuration information and, in turn, recommences decompression of the data stream at an input bit location corresponding to the commit point.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: June 21, 2016
    Assignee: International Business Machines Corporation
    Inventors: Kanak B. Agarwal, Damir A. Jamsek, Andrew K. Martin, Reiner Rieke, Joerg-Stephan Vogt, Gunnar von Boehn
  • Publication number: 20160079996
    Abstract: An output sequence of data elements is processed. The output sequence of data elements represents a sequence of input data elements in a compressed format. An output data element comprises a backward reference for each string in the input data elements that occurs again in an input data element that is used to produce the output data element. A backward reference identified in a selected output data element is used for selecting the string to which it refers in the stored input data elements. The selected string is combined with strings of one or more subsequent output data elements. A matching sequence in the stored input data elements matching at least part of one or more combined strings is found. A combined string of the one or more combined strings having the longest matching sequence is selected. The backward reference is redefined to indicate the longest matching sequence.
    Type: Application
    Filed: November 23, 2015
    Publication date: March 17, 2016
    Inventors: Thomas Fuchs, Christian Jacobi, Anthony T. Sofia, Joerg-Stephan Vogt
  • Publication number: 20160049951
    Abstract: Concurrently writing an uncompressed data element, if the uncompressed data element comprises an indication that it is valid, in a main hash table using a first address generated by a first hash function, and reading a first data element from the main hash table using the first address. Introducing a first pipeline delay for maintaining the uncompressed data element in a first data path until the first data element is read. Concurrently writing the first data element to a victim hash table, if the first data element comprises an indication that it is valid, using a second address generated by a second hash function, and reading a second data element from the victim hash table using a third address generated by the second hash function. Introducing a second pipeline delay for maintaining the uncompressed data element in the first data path until the second data element is read.
    Type: Application
    Filed: October 26, 2015
    Publication date: February 18, 2016
    Inventors: Thomas Fuchs, Christian Jacobi, Reiner Rieke, Joerg-Stephan Vogt
  • Patent number: 9262625
    Abstract: Embodiments relate an address translation/specification (ATS) field. An aspect includes receiving a work queue entry from a work queue in a main memory by a hardware accelerator, the work queue entry corresponding to an operation of the hardware accelerator that is requested by user-space software, the work queue entry comprising a first ATS field that describes a structure of the work queue entry. Another aspect includes, based on determining that the first ATS field is consistent with the operation corresponding to the work queue entry and the structure of the work queue entry, executing the operation corresponding to the work queue entry by the hardware accelerator. Another aspect includes, based on determining that the first ATS field is not consistent with the operation corresponding to the work queue entry and the structure of the work queue entry, rejecting the work queue entry by the hardware accelerator.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: February 16, 2016
    Assignee: International Business Machines Corporation
    Inventors: Frank Haverkamp, Christian Jacobi, Scot H. Rider, Vikramjit Sethi, Randal C. Swanberg, Joerg-Stephan Vogt
  • Patent number: 9256729
    Abstract: Embodiments relate an address translation/specification (ATS) field. An aspect includes receiving a work queue entry from a work queue in a main memory by a hardware accelerator, the work queue entry corresponding to an operation of the hardware accelerator that is requested by user-space software, the work queue entry comprising a first ATS field that describes a structure of the work queue entry. Another aspect includes, based on determining that the first ATS field is consistent with the operation corresponding to the work queue entry and the structure of the work queue entry, executing the operation corresponding to the work queue entry by the hardware accelerator. Another aspect includes, based on determining that the first ATS field is not consistent with the operation corresponding to the work queue entry and the structure of the work queue entry, rejecting the work queue entry by the hardware accelerator.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: February 9, 2016
    Assignee: International Business Machines Corporation
    Inventors: Frank Haverkamp, Christian Jacobi, Scot H. Rider, Vikramjit Sethi, Randal C. Swanberg, Joerg-Stephan Vogt
  • Patent number: 9209831
    Abstract: Concurrently writing an uncompressed data element, if the uncompressed data element comprises an indication that it is valid, in a main hash table using a first address generated by a first hash function, and reading a first data element from the main hash table using the first address. Introducing a first pipeline delay for maintaining the uncompressed data element in a first data path until the first data element is read. Concurrently writing the first data element to a victim hash table, if the first data element comprises an indication that it is valid, using a second address generated by a second hash function, and reading a second data element from the victim hash table using a third address generated by the second hash function. Introducing a second pipeline delay for maintaining the uncompressed data element in the first data path until the second data element is read.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: December 8, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas Fuchs, Christian Jacobi, Reiner Rieke, Joerg-Stephan Vogt
  • Patent number: 9197243
    Abstract: An output sequence of data elements is processed. The output sequence of data elements represents a sequence of input data elements in a compressed format. An output data element comprises a backward reference for each string in the input data elements that occurs again in an input data element that is used to produce the output data element. A backward reference identified in a selected output data element is used for selecting the string to which it refers in the stored input data elements. The selected string is combined with strings of one or more subsequent output data elements. A matching sequence in the stored input data elements matching at least part of one or more combined strings is found. A combined string of the one or more combined strings having the longest matching sequence is selected. The backward reference is redefined to indicate the longest matching sequence.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: November 24, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas Fuchs, Christian Jacobi, Anthony T. Sofia, Joerg-Stephan Vogt