Patents by Inventor Stephen A. Hauser
Stephen A. Hauser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10321601Abstract: An apparatus is disclosed for restricting air flow through an electronics enclosure. The apparatus may include a panel having at least one edge adapted to be secured to a surface of the electronics enclosure to thus place the panel in a path of a cooling air flow flowing through a cardcage portion of the enclosure. The panel may have a footprint that at least substantially fills an opening through which said cooling air flow flows through said cardcage portion of the enclosure. The panel may have a plurality of openings so that the panel reduces a volume of a cooling air flow flowing through the panel by a predetermined desired degree, and thus reduces a volume of the air flow through the cardcage to a desired volume.Type: GrantFiled: October 16, 2009Date of Patent: June 11, 2019Assignee: Artesyn Embedded Computing, Inc.Inventors: Pasi Jukka Vaananen, Stephen A. Hauser
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Patent number: 8363388Abstract: A power entry module (PEM) that is used with an electronics equipment enclosure. The PEM has a housing adapted to be coupled to a shelf of the electronics equipment enclosure. The housing has at least one pair of power cable lugs accessible from an exterior of the housing for coupling the PEM to a pair of power cables associated with a power feed. The PEM also has a backplane connector for coupling the PEM to a blackplane of the electronics enclosure. A distribution network is disposed within the PEM housing and forms at least a pair of electrically isolated power distribution buses for coupling electrical power provided from the power cables to each of the power distribution branches. Each power distribution branch independently provides electrical power to at least one blade supported within the electronics equipment enclosure.Type: GrantFiled: October 16, 2009Date of Patent: January 29, 2013Assignee: Emerson Network Power—Embedded Computing, Inc.Inventors: Jeffrey L. Wise, Pasi Jukka Vaananen, Stephen A. Hauser, James J. Dorsey
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Patent number: 7957138Abstract: A gap filler member apparatus for blocking air flow through a gap existing between an edge of a first electronics board and a surface of a second electronics board that is disposed generally perpendicular to the first electronics board, where the first and second electronics boards are coupled by at least one pair of connectors and disposed within an electronics equipment enclosure, to block air flow through the gap. The apparatus has at least one rib extending therefrom, with the base portion being secureable to the surface of the second electronics board. A rib extends away from the base portion and has a height approximately equal to a height of the gap, and a length at least as long as a length of the gap so that the rib at least substantially blocks air flow through the gap.Type: GrantFiled: October 16, 2009Date of Patent: June 7, 2011Assignee: Emerson Network Power - Embedded Computing, Inc.Inventors: Pasi Jukka Vaananen, Stephen A. Hauser, David Paul Banasek
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Publication number: 20100220432Abstract: A power entry module (PEM) that is used with an electronics equipment enclosure. The PEM has a housing adapted to be coupled to a shelf of the electronics equipment enclosure. The housing has at least one pair of power cable lugs accessible from an exterior of the housing for coupling the PEM to a pair of power cables associated with a power feed. The PEM also has a backplane connector for coupling the PEM to a blackplane of the electronics enclosure. A distribution network is disposed within the PEM housing and forms at least a pair of electrically isolated power distribution buses for coupling electrical power provided from the power cables to each of the power distribution branches. Each power distribution branch independently provides electrical power to at least one blade supported within the electronics equipment enclosure.Type: ApplicationFiled: October 16, 2009Publication date: September 2, 2010Applicant: EMERSON NETWORK POWER - EMBEDDED COMPUTING, INC.Inventors: Jeffrey L. Wise, Pasi Jukka Vaananen, Stephen A. Hauser, James J. Dorsey
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Publication number: 20100220456Abstract: A gap filler member apparatus for blocking air flow through a gap existing between an edge of a first electronics board and a surface of a second electronics board that is disposed generally perpendicular to the first electronics board, where the first and second electronics boards are coupled by at least one pair of connectors and disposed within an electronics equipment enclosure, to block air flow through the gap. The apparatus has at least one rib extending therefrom, with the base portion being secureable to the surface of the second electronics board. A rib extends away from the base portion and has a height approximately equal to a height of the gap, and a length at least as long as a length of the gap so that the rib at least substantially blocks air flow through the gap.Type: ApplicationFiled: October 16, 2009Publication date: September 2, 2010Applicant: EMERSON NETWORK POWER - EMBEDDED COMPUTING, INC.Inventors: Pasi Jukka Vaananen, Stephen A. Hauser, David Paul Banasek
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Publication number: 20100218920Abstract: A cooling system that has a fan having a plurality of fan blades disposed in a housing, with the fan having an input side and an exhaust side. A flow divider component may be disposed parallel to an axial center of the fan and positioned adjacent to the housing of the fan, and adjacent to one of the input side or the exhaust side. The flow divider may further project away from the fan blades for channeling an air flow created by the fan blades.Type: ApplicationFiled: October 16, 2009Publication date: September 2, 2010Applicant: EMERSON NETWORK POWER - EMBEDDED COMPUTING, INC.Inventors: Pasi Jukka Vaananen, Stephen A. Hauser, George Paul Zemke
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Publication number: 20100216390Abstract: An air flow restrictor panel adapted for use in an electronics equipment enclosure to block a gap existing between a midplane and an electronics module positioned adjacent the midplane. The air flow restrictor panel may incorporate a main panel portion and a plurality of flanges extending from the main panel portion. The main panel portion may have a footprint sufficiently large in area to block the gap.Type: ApplicationFiled: October 16, 2009Publication date: August 26, 2010Applicant: EMERSON NETWORK POWER - EMBEDDED COMPUTING, INC.Inventors: Pasi Jukka Vaananen, Stephen A. Hauser
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Publication number: 20100216389Abstract: An apparatus is disclosed for restricting air flow through an electronics enclosure. The apparatus may include a panel having at least one edge adapted to be secured to a surface of the electronics enclosure to thus place the panel in a path of a cooling air flow flowing through a cardcage portion of the enclosure. The panel may have a footprint that at least substantially fills an opening through which said cooling air flow flows through said cardcage portion of the enclosure. The panel may have a plurality of openings so that the panel reduces a volume of a cooling air flow flowing through the panel by a predetermined desired degree, and thus reduces a volume of the air flow through the cardcage to a desired volume.Type: ApplicationFiled: October 16, 2009Publication date: August 26, 2010Applicant: EMERSON NETWORK POWER - EMBEDDED COMPUTING, INC.Inventors: Pasi Jukka Vaananen, Stephen A. Hauser
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Publication number: 20090109619Abstract: A method and apparatus cooling a chassis. The apparatus includes a telecommunication shelf structure or chassis (102) having a top side (108), bottom side (110), front side (104) and back side (108). Slots that can support boards (112) are oriented between the top side and the bottom side. A first set of fans (126) pushes air flow through the slots from the front and bottom sides of the shelf structure to the top and back sides of the shelf structure, and a second set of fans (128) pulls air flow through the slots from the front and bottom sides of the shelf structure to the top and back of the shelf structure. The first and second set of fans form a fault tolerant and redundant fan configuration in the telecommunication shelf structure to achieve an S-shaped air flow through the telecommunication shelf structure.Type: ApplicationFiled: October 25, 2007Publication date: April 30, 2009Applicant: MOTOROLA, INC.Inventors: Jeffrey L. Wise, David S. Chau, Stephen A. Hauser, Pasi J. Vaananen
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Patent number: 6539025Abstract: An Asynchronous Transfer Mode switch and method which facilitate priority arbitration of point-to-point and point-to-multipoint transmission are disclosed. To execute point-to-multipoint operation a bandwidth arbiter maintains a first list of connections and bit vectors indicating designated destination ports. The list maintained by the bandwidth arbiter is then compared to an unassigned output port bit vector to determine matches therebetween at which point-to-multipoint transmission may be made by utilizing instantaneously unused bandwidth within the switch. To execute point-to-point operation each input port maintains a list of connections associated with each output port, and those lists are used in conjunction with output port request information per input port in the bandwidth arbiter to match requests to the unassigned output port bit vector. The bandwidth arbiter may also assign priority to connections in the list.Type: GrantFiled: March 11, 1999Date of Patent: March 25, 2003Assignees: Fujitsu Network Communications, Inc., Fujitsu LimitedInventors: Thomas A. Manning, Stephen A. Caldara, Stephen A. Hauser, Matthias L. Colsman
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Patent number: 6426957Abstract: An asynchronous transfer mode (ATM) based service consolidation switch (10) includes an input/output module (22) having a to-switch port (TSPP) processor (90) and a from-switch port processor (FSPP) (92). The TSPP (90) and the FSPP (92) communicate with a bandwidth arbiter (114), multipoint topology controllers (116), and a data crossbar (117) on a switch control module (32). The TSPP (90) receives traffic over links for conversion into an internal cell format. Internal cells are buffered until allowed to transfer to an appropriate FSPP (92). Multipoint topology controllers (116) performs translations for internal switch flow control through interactions between the TSPPs (90), FSPPs (92), and the bandwidth arbiter (114). The bandwidth arbiter (114) performs appropriate bandwidth arbitration to allow internal cells to flow from TSPPs (90) to FSPPs (92) over the data crossbar (117).Type: GrantFiled: December 11, 1998Date of Patent: July 30, 2002Assignees: Fujitsu Network Communications, Inc., Fujitsu LimitedInventors: Stephen A. Hauser, Stephen A. Caldara, Thomas A. Manning
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Patent number: 6256674Abstract: A method and apparatus for providing buffer state accounting at a link level, otherwise known as link flow control, in addition to flow control at the virtual connection level. Link flow control enables receiver cell buffer sharing while maintaining per-connection bandwidth with lossless cell transmission. High link level update frequency is enabled without a significant sacrifice in overall link forward bandwidth. A higher and thus more efficient utilization of receiver cell buffers is achieved.Type: GrantFiled: March 9, 1999Date of Patent: July 3, 2001Assignees: Fujitsu Network Communications, Inc., Fujitsu LimitedInventors: Thomas A. Manning, Stephen A. Caldara, Stephen A. Hauser, Douglas H. Hunt, Raymond L. Strouble
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Patent number: 6236655Abstract: A system (10) is provided for identifying a processing port (12) and a link (22) at which a cell (24) is received. The system (10) includes a logical link table (14) having a plurality of logical link entries (30). Each logical link entry (30), which corresponds to a particular link (22) of a processing port (12) associated with the logical link table (14), specifies a numerical value. The processing port (12) may receive the cell (24) at one of a plurality of links (22). The processing port (12) can convert the cell (24) by replacing a numerical value of an identification field, such as a virtual channel identification field (28), of the cell (24) with the numerical value specified by the logical link entry (30) corresponding to the link (22) at which the cell (24) is received. A switch control module (18), which is connected to the processing port (12), may receive the converted cell (38).Type: GrantFiled: July 18, 1996Date of Patent: May 22, 2001Assignees: Fujitsu Network Communications, Inc., Fujitsu LimitedInventors: Stephen A. Caldara, Stephen A. Hauser, Thomas A. Manning
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Patent number: 6167452Abstract: A mechanism enabling plural queues in a downstream telecommunications network element to be treated as a single, joint queue for purposes of connection-level flow control. A pointer in at least one queue descriptor points to a queue descriptor in which is maintained a set of shared, joint counters. Other flow control elements are maintained individually with respect to each queue descriptor. This mechanism enables flow control elements associated with a single transmitter queue to flow control plural connections terminating in plural queues associated with a single receiver processor.Type: GrantFiled: October 14, 1999Date of Patent: December 26, 2000Assignees: Fujitsu Network Communications, Inc., Fujitsu LimitedInventors: Thomas A. Manning, Stephen A. Caldara, Stephen A. Hauser, Alan D. Sherman
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Patent number: 6141346Abstract: An Asynchronous Transfer Mode switch and method which facilitate point-to-multipoint transmission are disclosed. Each input port within the switch includes a switch allocation table ("SAT") which manages bandwidth allocation and delay. Each SAT includes a plurality of sequentially ordered cell time slots, a subqueue and a synchronized pointer which is directed to one of the slots such that at any given point in time each of the pointers is directed to the same slot location in the respective SAT with which the pointer is associated. To execute point-to-multipoint operation where output port conflicts are present the switch transmits copies of the cell to the output ports at different points in time. More particularly, the switch transmits copies of the cell to available output ports, and tracks such transmission for managing future transmission to unserviced output ports. To track transmission the switch includes a map and scoreboard.Type: GrantFiled: July 18, 1996Date of Patent: October 31, 2000Assignees: Fujitsu Network Communications, Inc., Fujitsu LimitedInventors: Stephen A. Caldara, Stephen A. Hauser, Thomas A. Manning
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Patent number: 6115748Abstract: In a link-level flow controlled system, a method and apparatus providing the ability to partition a buffer resource among multiple prioritized buffer subsets through definition of at least one threshold, the buffer resource being shared by a plurality of connections. Different category of service levels, in terms of delay bounds, are thus enabled. The presently disclosed link-level flow controlled system provides for zero cell loss. The shared buffer resource is divided among N priority pools, defined by N-1 threshold levels, each priority pool attributable to a respective category of service. Link-level counters and registers, disposed in a transmit element, as well as an indication of priority level associated with each connection, are employed in realizing the shared buffer resource.Type: GrantFiled: July 18, 1996Date of Patent: September 5, 2000Assignees: Fujitsu Network Communications, Inc., Fujitsu LimitedInventors: Stephen A. Hauser, Stephen A. Caldara, Thomas A. Manning
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Patent number: 6108692Abstract: A method and apparatus for receiving and transmitting network frames via an internetworking device, in which a first portion of a total number of buffers is allocated among port-dedicated buffer pools, and a second portion is placed in a common pool accessible by any of the network ports. A frame is received at a first port, and a list of buffers accessible only by that port is referenced to identify buffers not already in use. A second list of buffers in the common pool is referenced to identify unused buffers for use if insufficient unused buffer space is available in the port-dedicated buffer pool. Frame data is then stored in the identified buffer(s). Upon retransmission, the buffer(s) used to store the. transmitted frame is released to the port-dedicated and/or common buffer pool(s).Type: GrantFiled: February 17, 1998Date of Patent: August 22, 2000Assignee: 3Com CorporationInventors: Stephen L. Van Seters, Stephen A. Hauser, Mark A. Sankey, Christopher P. Lawler
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Patent number: 6088736Abstract: A mechanism enabling plural queues in a downstream telecommunications network element to be treated as a single, joint queue for purposes of connection-level flow control. A pointer in at least one queue descriptor points to a queue descriptor in which is maintained a set of shared, joint counters. Other flow control elements are maintained individually with respect to each queue descriptor. This mechanism enables flow control elements associated with a single transmitter queue to flow control plural connections terminating in plural queues associated with a single receiver processor.Type: GrantFiled: July 18, 1996Date of Patent: July 11, 2000Assignees: Fujitsu Network Communications, Inc., Fujitsu LimitedInventors: Thomas A. Manning, Stephen A. Caldara, Stephen A. Hauser, Alan D. Sherman
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Patent number: 6076112Abstract: In a link-level flow controlled system, a method and apparatus providing the ability to partition a buffer resource among multiple prioritized buffer subsets through definition of at least one threshold, the buffer resource being shared by a plurality of connections. Different category of service levels, in terms of delay bounds, are thus enabled. The presently disclosed link-level flow controlled system provides for zero cell loss. The shared buffer resource is divided among N priority pools, defined by N-1 threshold levels, each priority pool attributable to a respective category of service. Link-level counters and registers, disposed in a transmit element, as well as an indication of priority level associated with each connection, are employed in realizing the shared buffer resource.Type: GrantFiled: March 9, 1999Date of Patent: June 13, 2000Assignees: Fujitsu Network Communications, Inc., Fujitsu LimitedInventors: Stephen A. Hauser, Stephen A. Caldara, Thomas A. Manning
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Patent number: 6002667Abstract: A method and apparatus for providing a minimum per-connection bandwidth guarantee and the ability to employ shared bandwidth thereabove in an environment having both virtual-connection and link-level flow control. A buffer pool downstream of a transmitter and disposed in a receiver is divided among a first portion dedicated for allocated bandwidth cell traffic and a second portion for dynamic bandwidth cell traffic. Link flow control enables receiver cell buffer sharing while maintaining the per-connection bandwidth guarantee. No cell-loss due to buffer overflows at the receiver is also guaranteed, resulting in high link-utilization in a frame traffic environment, as well as low delay in the absence of cell retransmission. A higher and thus more efficient utilization of receiver cell buffers is achieved.Type: GrantFiled: July 18, 1996Date of Patent: December 14, 1999Assignees: Fujitsu Network Communications, Inc., Fujitsu LimitedInventors: Thomas A. Manning, Stephen A. Caldara, Stephen A. Hauser