Abstract: A system (10) is provided for mapping a data cell (32) in a communication switch. The system (10) includes a virtual translation table (40) having at least one virtual path translation table queue entry (92) and at least one virtual channel translation table queue entry (90). A to-switch port processor (12), which can access the virtual translation table (40), has at least one link (16-30) which receives the data cell (32). The to-switch port processor (12) maps the received data cell (32) to a queue descriptor using the virtual translation table (40).

Abstract: A method and apparatus for providing buffer state accounting at a link level, otherwise known as link flow control, in addition to flow control at the virtual connection level. Link flow control enables receiver cell buffer sharing while maintaining perconnection bandwidth with lossless cell transmission. High link level update frequency is enabled without a significant sacrifice in overall link forward bandwidth. A higher and thus more efficient utilization of receiver cell buffers is achieved.

Abstract: A system for managing resources such as buffers and bandwidth which are allocated to competing entities through two or more levels in a telecommunications network is disclosed. The system provides a tool to allocate resources for use by individual entities. Each entity may be assigned a Minimum.sub.-- Guaranteed variable and a Maximum.sub.-- Allowed variable. When an entity requests resources the system determines if the entity is using its respective minimum guaranteed resource allocation which is specified by the Minimum.sub.-- Guaranteed variable. If the entity is not using its respective minimum guaranteed resource allocation, the system allocates a resource unit to the requesting entity. The system also allows a requesting entity to use additional resource units above the resource allocation specified by the Minimum.sub.-- Guaranteed variable, provided such resource units are available.

Abstract: A linked-list structure and method for use in an ATM network switch capable of adaptively providing highly efficient, and thus low cost, integrated services therein. The linked-list structure involves the creation of a list having pointers to a subsequent linked list as list entries. Within the subsequent linked list, each entry can be a pointer to a further linked list. The structure can be expanded to further levels of linked lists as required. Bandwidth distribution is thus achieved among list members at each level. The linked-list structure is employed in the present switch, which includes an input port processor, a bandwidth arbiter, and an output port processor, for switch bandwidth scheduling for both point-to-point, multipoint-to-point and point-to-multipoint cell transfers from the input port processor, and for output link scheduling at the output port processor.

Abstract: A switch fabric controller comparator system (200) is provided for comparing the contents of a foreground port mapping memory (25) and a background port mapping memory (125). The switch fabric controller comparator system (200) includes the foreground port mapping memory (25), the background port mapping memory (125), and a switch fabric controller comparator (150). ?? The foreground port mapping memory (25) is populated with foreground port mapping data identifying the mapping of an output port of a foreground switch fabric (26) to an input port of the foreground switch fabric (26), and the background port mapping memory (125) is populated with the background port mapping data identifying the mapping of an output port of a background switch fabric (126) to an input port of the background switch fabric (126).

Abstract: A method and apparatus for controlling network service parameters in a cell based communications network. A plurality of input signals are received on input ports of a communications device and a plurality of output signals are sourced from output ports, wherein at least one input signal and at least one output signal comprise, respectively, at least one virtual connection. The communications device is part of a cell based communications network and each virtual connection comprises a series of data cells comprising a header portion and a data portion. A first virtual connection is assigned to an input queue of an input port and an output queue of an output port. Each queue is associated with a first buffer space dedicated to the respective queue. Each queue is also associated with a second buffer space that is shared between the respective queue and other queues. The second buffer space is utilized after the first buffer space becomes full.

Abstract: An Asynchronous Transfer Mode switch and method which facilitate point-to-multipoint transmission are disclosed. The switch includes a bandwidth arbiter, and each input port within the switch includes a switch allocation table ("SAT") which controls bandwidth allocation between input and output ports. Each SAT includes a plurality of sequentially ordered cell time slots and a synchronized pointer which is directed to one of the slots such that at any given point in time each of the pointers is directed to the same slot location in the respective SAT with which the pointer is associated. To execute point-to-multipoint operation the bandwidth arbiter maintains a list of connections and bit vectors indicating the designated destination ports for a point-to-multipoint cell.

Abstract: An asynchronous transfer mode (ATM) based service consolidation switch (10) includes an input/output module (22) having a to-switch port (TSPP) processor (90) and a from-switch port processor (FSPP) (92). The TSPP (90) and the FSPP (92) communicate with a bandwidth arbiter (114), multipoint topology controllers (116), and a data crossbar (117) on a switch control module (32). The TSPP (90) receives traffic over links for conversion into an internal cell format. Internal cells are buffered until allowed to transfer to an appropriate FSPP (92). Multipoint topology controllers (116) performs translations for internal switch flow control through interactions between the TSPPs (90), FSPPs (92), and the bandwidth arbiter (114). The bandwidth arbiter (114) performs appropriate bandwidth arbitration to allow internal cells to flow from TSPPs (90) to FSPPs (92) over the data crossbar (117).

Abstract: The invention comprises a method and apparatus for discarding frames in a communications device. In accordance with the method of the invention, a plurality of cells are received representing a plurality of frames wherein each cell comprises a data portion and a header portion including a cell loss priority indicator. At least some of the cells are stored in a buffer. It is determined if the number of cells in the buffer exceeds a first threshold when a first cell including an end of file marker is received. A series of cells received between the first cell and a second cell are discarded if the first threshold was exceeded in the determining step and if the cell loss priority indicator for a cell in the series of cells is set to a first state. The second cell comprises a cell including an end of file marker.

Abstract: A method and apparatus for receiving and transmitting network frames via an internetworking device, in which a first portion of a total number of buffers is allocated among port-dedicated buffer pools, and a second portion is placed in a common pool accessible by any of the network ports. A frame is received at a first port, and a list of buffers accessible only by that port is referenced to identify buffers not already in use. A second list of buffers in the common pool is referenced to identify unused buffers for use if insufficient unused buffer space is available in the port-dedicated buffer pool. Frame data is then stored in the identified buffer(s). Upon retransmission, the buffer(s) used to store the transmitted frame is released to the port-dedicated and/or common buffer pool(s).

Abstract: The invention comprises a method and apparatus for reducing information loss in a communications network. In accordance with the method of the invention, a plurality of virtual connections are sent over a first link from a first node in the communications network to a second node. The first and second nodes comprise a plurality of input queues coupled to a switching network which is in turn coupled to a plurality of output queues. Each virtual connection is associated with a first output queue in the first node and a second input queue and a second output queue in the second node. A connection feedback signal is provided from the second node to the first node comprising data reflecting the status of the second input queue associated with a virtual connection. The flow of information between the first node and the second node is controlled for each virtual connection in response to the connection feedback signal associated with that virtual connection.

Abstract: The invention comprises a method and apparatus for emulating a circuit connection in a cell based communications network. A virtual connection is sent from a source connected to the network to a node in the network wherein the virtual connection comprises a series of data cells comprising a header portion and a data portion. The virtual connection is transported across at least one communications link connecting the first node to a second node in the network. A first queue is dedicated to the virtual connection at each node in the network through which the signal passes. The queue comprises a first amount of buffer space, is dedicated for the duration of the circuit connection and, dedicated only to that virtual connection. A first amount of link bandwidth is allocated to the virtual connection on each communications link across which the virtual connection passes. The amount of link bandwidth is allocated for the duration of the circuit connection and is allocated only to that particular virtual connection.

Abstract: A method and apparatus for providing buffer state accounting at a link level, otherwise known as link flow control, in addition to flow control at the virtual connection level. Link flow control enables receiver cell buffer sharing while maintaining per-connection bandwidth with lossless cell transmission. High link level update frequency is enabled without a significant sacrifice in overall link forward bandwidth. A higher and thus more efficient utilization of receiver cell buffers is achieved.

Abstract: An ATM network switch and method of utilization for adaptively providing integrated services therein is disclosed. In providing such integrated services, if the allocated bandwidth for one connection has been consumed, or if the connection is not entitled to allocated bandwidth, the connection can optionally use dynamic bandwidth arbitration, or a combination of both allocated and dynamic. The switch includes an input port processor, a bandwidth arbiter, and an output port processor. Cells are transmitted from the input to the output, under the control of respective port processors and the bandwidth arbiter. Flow control is implemented on a per-connection basis. Individual queues are then assigned to traffic type groups in order to provide traffic type flow control. Based upon prioritization information associated with the cell at the input, cells are prioritized and transmitted from the output, with each cell maintained in the same order, relative to other cells on a connection, in which it was received.

Abstract: An improved method and apparatus for recognizing, classifying and processing frames received at a frame processor in a computer network is disclosed. Following receipt of a frame at an input port of a frame processor, source and destination addresses are parsed from the frame. A plurality of lookup tables are provided in a memory, each of which contains a search field and a classification key field. Source or destination addresses are stored in the respective search fields along with other information associated with the frame and a compact classification key is stored in the corresponding classification key field. Searches are performed of the respective search fields within the respective lookup tables to determine whether a match exists between the each of the destination and source addresses and other information and the search field within the lookup tables. In the event the searches yield a match, a classification key associated with each respective address is retrieved.

Abstract: A live insertion and removal mechanism assures that a sub-assembly being inserted or removed from a live electronic assembly does not disrupt system power and busses and is protected against the negative effects of current surge. Slot bypass circuitry is provided for effectively disconnecting selected output drivers from signal and control paths to avoid damage to the drivers upon insertion or removal of the sub-assembly from the live assembly.

Abstract: A live insertion and removal mechanism assures that a sub-assembly being inserted or removed from a live electronic assembly does not disrupt system power and buses and is protected against the negative effects of current surge. An active current control device and related circuitry, and a connector having a plurality of graduated pin lengths effect a controlled ramp-up and ramp-down of power to the sub-assembly inserted into and removed from the live electronic assembly. Additionally, disconnecting selected output drivers from signal and control paths to avoid damage to the drivers upon insertion or removal of the sub-assembly from the live assembly.

Abstract: A live insertion and removal mechanism assures that a sub-assembly being inserted or removed from a live electronic assembly does not disrupt system power and buses and is protected against the negative affects of current surge. An active current control device and related circuitry, and a connector having a plurality of graduated pin lengths effect a controlled ramp-up and ramp-down of power to the sub-assembly inserted into and removed from the live electronic assembly. Additionally, means are provided for effectively disconnecting selected output drivers from signal and control paths to avoid damage to the drivers upon insertion or removal of the sub-assembly from the live assembly.