Patents by Inventor Stephen J. Gaul

Stephen J. Gaul has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5070596
    Abstract: Integrated circuits are formed by bonding two substrates together on a moat or recess. If the moat is exposed at a side wall, an optical fiber is inserted therein and communicates optically with a photoelectric device in the substrate by a slant side wall of the moat. If the moat is sealed by a cover layer resulting from removing all or most of the top substrate leaving the bonding layer as a cover, a pressure responsive device is formed on the cover layer directly or in the remaining top substrate over the sealed cavity.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: December 10, 1991
    Assignee: Harris Corporation
    Inventors: Stephen J. Gaul, Craig J. McLachlan
  • Patent number: 5037765
    Abstract: Integrated circuits are formed by bonding two substrates together on a moat or recess. If the moat is exposed at a side wall, an optical fiber is inserted therein and communicates optically with a photoelectric device in the substrate by a slant side wall of the moat. If the moat is sealed by a cover layer resulting from removing all or most of the top substrate leaving the bonding layer as a cover, a pressure responsive device is formed on the cover layer directly or in the remaining top substrate over the sealed cavity.
    Type: Grant
    Filed: January 12, 1990
    Date of Patent: August 6, 1991
    Assignee: Harris Corporation
    Inventors: Stephen J. Gaul, Craig J. McLachlan
  • Patent number: 4968628
    Abstract: A method including forming an alignment moat of a first depth on a first surface of a substrate and performing all backside processing, forming a first oxide layer on the first surface and oxide bonding it to a handling wafer by oxide bonding. The substrate is then thinned from a second surface opposite the first surface down to a thickness less than the depth of the alignment moat so the alignment moat is exposed at a third surface for front side processing.
    Type: Grant
    Filed: December 9, 1988
    Date of Patent: November 6, 1990
    Assignee: Harris Corporation
    Inventors: Jose A. Delgado, Stephen J. Gaul, Craig J. McLachlan, George V. Rouse
  • Patent number: 4916497
    Abstract: Integrated circuits are formed by bonding two substrates together on a moat or recess. If the moat is exposed at a side wall, an optical fiber is inserted therein and communicates optically with a photoelectric device in the substrate by a slant side wall of the moat. If the moat is sealed by a cover layer resulting from removing all or most of the top substrate leaving the bonding layer as a cover, a pressure responsive device is formed on the cover layer directly or in the remaining top substrate over the sealed cavity.
    Type: Grant
    Filed: May 18, 1988
    Date of Patent: April 10, 1990
    Assignee: Harris Corporation
    Inventors: Stephen J. Gaul, Craig J. McLachlan