Abstract: A direct attach optical receiver module and a system and method for testing the direct attach optical receiver module are provided. An optical receiver module may include an optical detector and an integrated circuit with an integrated amplifier circuit and at least one integrated capacitor. In one example, the optical detector may be physically attached to the integrated circuit and the output port of the optical detector may be electrically coupled to the input port of the integrated circuit. In another example, a redistribution layer that includes a tuning inductor may be being physically attached between the optical detector and the integrated circuit.

Abstract: A direct attach optical receiver module and a system and method for testing the direct attach optical receiver module are provided. An optical receiver module may include an optical detector and an integrated circuit with an integrated amplifier circuit and at least one integrated capacitor. In one example, the optical detector may be physically attached to the integrated circuit and the output port of the optical detector may be electrically coupled to the input port of the integrated circuit. In another example, a redistribution layer that includes a tuning inductor may be being physically attached between the optical detector and the integrated circuit.

Abstract: A direct attach optical receiver module and a system and method for testing the direct attach optical receiver module are provided. An optical receiver module may include an optical detector and an integrated circuit with an integrated amplifier circuit and at least one integrated capacitor. In one example, the optical detector may be physically attached to the integrated circuit and the output port of the optical detector may be electrically coupled to the input port of the integrated circuit. In another example, a redistribution layer that includes a tuning inductor may be being physically attached between the optical detector and the integrated circuit.

Abstract: A direct attach optical receiver module and a system and method for testing the direct attach optical receiver module are provided. An optical receiver module may include an optical detector and an integrated circuit with an integrated amplifier circuit and at least one integrated capacitor. In one example, the optical detector may be physically attached to the integrated circuit and the output port of the optical detector may be electrically coupled to the input port of the integrated circuit. In another example, a redistribution layer that includes a tuning inductor may be being physically attached between the optical detector and the integrated circuit.

Abstract: A direct attach optical receiver module and a system and method for testing the direct attach optical receiver module are provided. An optical receiver module may include an optical detector and an integrated circuit with an integrated amplifier circuit and at least one integrated capacitor. In one example, the optical detector may be physically attached to the integrated circuit and the output port of the optical detector may be electrically coupled to the input port of the integrated circuit. In another example, a redistribution layer that includes a tuning inductor may be being physically attached between the optical detector and the integrated circuit.

Abstract: Within an amplifier circuit having an amplifying transistor, a boost voltage is presented at a port of the transistor. The amplifying transistor has a base, an emitter and a collector or a gate, a source, and a drain. A capacitor is provided in electrical communication with the transistor. A voltage source is provided for providing one of the collector and the source with a first voltage and for in a first mode of operation charging the first capacitor. Also within the circuit is a switch for switching between the first mode of operation and a second other mode of operation wherein the first capacitor and the voltage source cooperate to provide a voltage at one of the collector and the source in excess of the first voltage.

Abstract: Optical receiver modules are used for receiving high-speed optical data signals. Unfortunately, these optical receiver modules are often tested for the first time after they are packaged in a housing. Thus significant costs are associated with those packaged devices that fail to meet predetermined criteria. An integrated optical receiver module is proposed that has an optical detector direct attached, or flip-chipped or bumped, onto an integrated circuit having an amplifier circuit. The direct attach process is performed when the integrated circuits still reside on a semiconductor wafer prior to dicing thereof. Thus, high speed optical testing of the optical receiver module is possible on a wafer level to determine actual performance characteristics thereof prior to dicing.

Abstract: A front end tuner for receiving TV signals and the like includes a frequency conversion circuit including a mixer for beating a local signal with received signals within a predetermined band of frequencies to provide selected signals within a predetermined band of frequencies to provide selected signals within a predetermined channel band of frequencies. A signal converter circuit generates digitally encoded signal representations of the selected signals. The frequency conversion circuit and the signal converter circuit are in a form of an integrated circuit within a semiconductor substrate. In a TV receiver, on-following digital processing of the digitally encoded signals is performed in a microcomputer. In one example a channel selection code is used by the microcomputer to synthesize the local oscillator signal and in another example the signal converter circuit is a codec, responsive to codes from the microprocessor, to supply a control voltage for controlling a local oscillator.

Abstract: A bipolar transistor is disclosed that is produced using a sacrificial mesa disposed over a layer of Si and SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the Si and SiGe layer forming the transistor base. After an etching process, the sacrificial mesa is removed and the Si and SiGe layer is exposed, where an oppositely doped material is applied over top of the Si and SiGe layer to form an emitter. This makes it possible to realize a thin layer of Si and silicon germanium to serve as the transistor base. The transistor device formed using the sacrificial mesa results in the base layer Si and SiGe not being affected by a process of etching, as it otherwise would be using a conventional double-poly process, which results in a more repeatable bipolar transistor device yield.

Abstract: Optical receiver modules are used for receiving high-speed optical data signals. Unfortunately, these optical receiver modules are often tested for the first time after they are packaged in a housing. Thus significant costs are associated with those packaged devices that fail to meet predetermined criteria. An integrated optical receiver module is proposed that has an optical detector direct attached, or flip-chipped or bumped, onto an integrated circuit having an amplifier circuit. The direct attach process is performed when the integrated circuits still reside on a semiconductor wafer prior to dicing thereof. Thus, high speed optical testing of the optical receiver module is possible on a wafer level to determine actual performance characteristics thereof prior to dicing.

Abstract: Disclosed is a method of producing elementary semiconductor devices such as a field-effect transistor, a capacitor, a resistor, an inductor, a transformer, or a diode, and devices produced by said method. According to the method, a semiconductor seed layer is applied to a substrate having regions of exposed semiconductor material and regions of exposed dielectric material. The method comprises a step of disposing the substrate in a growth chamber and nucleating the seed layer by exposing the semiconductor material and dielectric material to an atmosphere of gases presented at a predetermined flow rate, temperature and pressure selected to provide contiguous growth of the seed layer, the seed layer growing in a single crystal lattice over predetermined windows within the mixed topology substrate.

Abstract: A front end tuner for receiving TV signals and the like includes a frequency conversion circuit including a mixer for beating a local signal with received signals within a predetermined band of frequencies to provide selected signals within a predetermined band of frequencies to provide selected signals within a predetermined channel band of frequencies. A signal converter circuit generates digitally encoded signal representations of the selected signals. The frequency conversion circuit and the signal converter circuit are in a form of an integrated circuit within a semiconductor substrate. In a TV receiver, on-following digital processing of the digitally encoded signals is performed in a microcomputer. In one example a channel selection code is used by the microcomputer to synthesize the local oscillator signal and in another example the signal converter circuit is a codec, responsive to codes from the microprocessor, to supply a control voltage for controlling a local oscillator.

Abstract: A method of producing a bipolar transistor includes the step of providing a sacrificial mesa over a layer of SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the SiGe layer forming the transistor base. After an etching process removes the sacrificial mesa and the SiGe layer is exposed, an oppositely doped material is applied over top of the SiGe layer to form an emitter. This makes it possible to realize a thin layer of silicon germanium to serve as the transistor base. This method prevents the base layer SiGe from being affected, as it otherwise would be using a conventional double-poly process.

Abstract: A method of producing a bipolar transistor includes the step of providing a sacrificial mesa over a layer of SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the SiGe layer forming the transistor base. After an etching process removes the sacrificial mesa and the SiGe layer is exposed, an oppositely doped material is applied over top of the SiGe layer to form an emitter. This makes it possible to realize a thin layer of silicon germanium to serve as the transistor base. This method prevents the base layer SiGe from being affected, as it otherwise would be using a conventional double-poly process.

Abstract: A method of producing a bipolar transistor includes the step of providing a sacrificial mesa over a layer of SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the SiGe layer forming the transistor base. After an etching process removes the sacrificial mesa and the SiGe layer is exposed, an oppositely doped material is applied over top of the SiGe layer to form an emitter. This makes it possible to realize a thin layer of silicon germanium to serve as the transistor base. This method prevents the base layer SiGe from being affected, as it otherwise would be using a conventional double-poly process.

Abstract: A method and apparatus is provided for locating with improved vertical positioning accuracy a discrete element on a semiconductor optoelectronic integrated circuit. The method employs an etch stop layer located beneath a series of semiconductor layers. The semiconductor layers may include waveguides to couple light between integrated or discrete elements. Pits with accurate depth are etched in the semiconductor layers down to the etch stop layer. Accurate alignment between a discrete element and another element is made possible by controlling their respective distances from the etch stop layer.

Abstract: A method of producing a bipolar transistor includes the step of providing a sacrificial mesa over a layer of SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the SiGe layer forming the transistor base. After an etching process removes the sacrificial mesa and the SiGe layer is exposed, an oppositely doped material is applied over top of the SiGe layer to form an emitter. This makes it possible to realize a thin layer of silicon germanium to serve as the transistor base. This method prevents the base layer SiGe from being affected, as it otherwise would be using a conventional double-poly process.

Abstract: A method and apparatus is provided for locating with improved vertical positioning accuracy a discrete element on a semiconductor optoelectronic integrated circuit. The method employs an etch stop layer located beneath a series of semiconductor layers. The semiconductor layers may include waveguides to couple light between integrated or discrete elements. Pits with accurate depth are etched in the semiconductor layers down to the etch stop layer. Accurate alignment between a discrete element and another element is made possible by controlling their respective distances from the etch stop layer.

Abstract: A channel waveguide structure which can be incorporated into VLSI (very large scale integration) integrated circuits uses a SiGe (silicon germanium) alloy core and Si (silicon) top and bottom cladding layers. The core may consist of only a SiGe alloy layer or it may be formed as a superlattice containing Si layers alternating with SiGe alloy layers. LOCOS (locally oxidized silicon) regions are formed on the top cladding layer at spaced locations thereby defining lateral boundaries of channels in the core.

Abstract: A channel waveguide structure which can be incorporated into VLSI (very large scale integration) integrated circuits uses a SiGe (silicon germanium) alloy core and Si (silicon) top and bottom cladding layers. The core may consist of only a SiGe alloy layer or it may be formed as a superlattice containing Si layers alternating with SiGe alloy layers. LOCOS (locally oxidized silicon) regions are formed on the top cladding layer at spaced locations thereby defining lateral boundaries of channels in the core.