Abstract: A fuse element partially encapsulated in an arc-suppression material which can, in turn, be integrated along with a semiconductor device into a semiconductor package to provide overcurrent protection, as well as a method of integrating such a fuse along with a semiconductor device into a semiconductor package wherein the semiconductor package has a standard form factor based on the semiconductor device integrated within.

Abstract: An arrangement of voltage variable materials for the protection of electrical components from electrical overstress (EOS) transients. A device having a plurality of electrical leads, a ground plane and a layer of voltage variable material. The voltage variable material physically bonds the plurality of electrical leads to one another as well as provides an electrical connection between the plurality of electrical leads and the ground plane. A die having a circuit integrated therein is attached to the ground plane. Conductive members electrically connect the plurality of electrical leads to the integrated circuit. At normal operating voltages, the voltage variable material has a high resistance, thus channeling current from the electrical leads to the integrated circuit via the conductive members.

Abstract: A number of integrated circuit dies having on board protection against electrical overstress (EOS) transients are provided. Generally, the devices have an integrated circuit die with an outer periphery and a functional die area. A plurality of conductive input/output pads are formed on the integrated circuit die. Typically, a first conductive guard rail is disposed on the integrated circuit die and forms a gap between each one of the input/output pads. A voltage variable material is disposed in the gaps between the conductive guard rail and the input/output pads. Typically, a plurality of electrical leads are electrically connected to a respective one of the plurality of conductive input/output pads. At normal operating voltages, the voltage variable material is non-conductive. However, in response to an EOS transient, the voltage variable material switches to a low resistance state, providing a conductive path between the conductive guard rail and the input/output pads.

Abstract: An integrated circuit die having on board protection against electrical overstress (EOS) transients. A device having an integrated circuit die with an outer periphery and a functional die area. A plurality of conductive input/output pads are formed on the integrated circuit die. A first conductive guard rail is disposed on the integrated circuit die and forms a gap between each one of the input/output pads. A voltage variable material is disposed in the gaps between the conductive guard rail and the input/output pads. A plurality of electrical leads are electrically connected to a respective one of the plurality of conductive input/output pads. At normal operating voltages, the voltage variable material is non-conductive. However, in response to an EOS transient, the voltage variable material switches to a low resistance state, providing a conductive path between the conductive guard rail and the input/output pads.

Abstract: A method for fabricating transient voltage protection devices is described wherein a gap between a ground conductor and another conductor is formed using a diamond dicing saw. Substrate material selection and includes specific ceramic materials designed to optimize performance and manufacturability. An overlay layer can be provided to minimize burring of the conductors during formation of the gap.

Abstract: A transient voltage protection device is described wherein a gap between a ground conductor and another conductor is formed using a diamond dicing saw. Substrate material selection includes specific ceramic materials having a density of less than 3.8 gm/cm.sup.3 designed to optimize performance and manufacturability. An overlay layer can be provided to minimize burring of the conductors during formation of the gap.

Abstract: A method for manufacturing a subminiature fuse includes the steps of applying metallized coatings to surfaces at axially opposite ends of a hollow fuse body, placing a fuse element in an internal cavity in the fuse body, the fuse element extending from the first end to the second end of the cavity, placing a one of a solder and brazing preform and end termination at each of the first and second ends of the cavity, and heating the assembled fuse body, fuse element, solder preforms and end terminations to a temperature sufficient to cause the solder preforms to bond the fuse element to the end terminations and for the end terminations to bond with the metallized end portions of the fuse body, wherein the end terminations form hermetic seals closing the ends of the cavity. A subminiature fuse according to the invention includes a fuse body with a fuse element diagonally disposed in the body. The fuse body includes metallized end portions to which the end terminations are bonded.