Patents by Inventor Stephen P. DeOrnellas

Stephen P. DeOrnellas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010003676
    Abstract: Method and apparatus for etching a silicide stack including etching the silicide layer at a temperature elevated from that used to etch the rest of the layers in order to accomplish anisotropic etch.
    Type: Application
    Filed: January 12, 2001
    Publication date: June 14, 2001
    Applicant: Tegal Corporation
    Inventors: Steven Marks, Leslie G. Jerde, Stephen P. DeOrnellas
  • Publication number: 20010001413
    Abstract: A method and apparatus for increasing wafer throughput between cleanings in a semiconductor processing reactor 20 includes a mechanism 58 for exchanging any one of or combination of an electrode 32, a dispersion head 42, and related chamber walls 22 and insulation and/or other collecting surfaces or elements with replacement components without having to open the reaction chamber 24 to atmospheric pressure and thus, while maintaining the reaction chamber 24 at about the operating pressure or vacuum.
    Type: Application
    Filed: May 28, 1998
    Publication date: May 24, 2001
    Applicant: Stephen P. DeOrnellas
    Inventors: STEPHEN P. DEORNELLAS, ALFRED COFER
  • Patent number: 6190496
    Abstract: A plasma etch reactor 20 includes a reactor chamber 22 with a grounded upper electrode 24, a lower electrode 28 which is attached to a high frequency power supply 30 and a low frequency power supply 32, and a peripheral electrode 26 which is located between the upper and lower electrode, and which is allowed to have a floating potential. Rare earth magnets 46, 47 are used to establish the magnetic field which confines the plasma developed within the reactor chamber 22. The plasma etch reactor 20 is capable of etching emerging films used with high density semiconductor devices.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: February 20, 2001
    Assignee: Tegal Corporation
    Inventors: Stephen P. DeOrnellas, Alferd Cofer, Robert C. Vail
  • Patent number: 6173674
    Abstract: A reactor 20 includes a shield 50 which prevents the deposition of materials along a line-of-sight path from a wafer 26 toward and onto an electrode 32, or a window 38 which couples an electrode 32 to a reaction chamber of the reactor 20. The shield can be comprised of a conductor and/or an insulator. The shield can affect the character of a plasma generated in the reactor.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: January 16, 2001
    Assignee: Tegal Corporation
    Inventors: Stephen P. DeOrnellas, Robert A. Ditizio
  • Patent number: 6170431
    Abstract: A reactor 20 includes a shield 50 which prevents the deposition of materials along a line-of-sight path from a wafer 26 toward and onto an electrode 32, or a window 38 which couples an electrode 32 to a reaction chamber of the reactor 20. The shield can be comprised of a conductor and/or an insulator. The shield can affect the character of a plasma generated in the reactor.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: January 9, 2001
    Assignee: Tegal Corporation
    Inventors: Stephen P. DeOrnellas, Robert A. Ditizio
  • Patent number: 6127277
    Abstract: A method and apparatus provide for etching a semiconductor wafer using a two step physical etching and a chemical etching process in order to create vertical sidewalls required for high density DRAMs and FRAMs.
    Type: Grant
    Filed: November 1, 1996
    Date of Patent: October 3, 2000
    Assignee: Tegal Corporation
    Inventors: Stephen P. DeOrnellas, Alferd Cofer, Paritosh Rajora
  • Patent number: 6048435
    Abstract: A plasma etch reactor 20 includes a reactor chamber 22 with a grounded upper electrode 24, a lower electrode 28 which is attached to a high frequency power supply 30 and a low frequency power supply 32, and a peripheral electrode 26 which is located between the upper and lower electrode, and which is allowed to have a floating potential. Rare earth magnets 46, 47 are used to establish the magnetic field which confines the plasma developed within the reactor chamber 22. The plasma etch reactor 20 is capable of etching emerging films used with high density semiconductor devices.
    Type: Grant
    Filed: July 3, 1996
    Date of Patent: April 11, 2000
    Assignee: TEGAL Corporation
    Inventors: Stephen P. DeOrnellas, Alferd Cofer, Robert C. Vail
  • Patent number: 6046116
    Abstract: A method for minimizing the critical dimension growth of a feature on a semiconductor wafer includes performing an etch operation in a reactor 20 and controlling the temperature of the wafer 26 by controlling the pressure of the gas contacting the backside of the wafer 26 and/or providing a heat source 56 such as for example in the chuck 46 or electrode 28 associated with the wafer 26 in order to heat the wafer 26.
    Type: Grant
    Filed: November 19, 1997
    Date of Patent: April 4, 2000
    Assignee: Tegal Corporation
    Inventors: Stephen P. DeOrnellas, Alfred Cofer, Leslie G. Jerde, Kurt A. Olson, Paritosh Rajora
  • Patent number: 6006694
    Abstract: A reactor 20 includes a shield 50 which prevents the deposition of materials along a line-of-sight path from a wafer 26 toward and onto an electrode 32, or a window 38 which couples an electrode 32 to a reaction chamber of the reactor 20. The shield can be comprised of a conductor and/or an insulator. The shield can affect the character of a plasma generated in the reactor.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: December 28, 1999
    Assignee: Tegal Corporation
    Inventors: Stephen P. DeOrnellas, Robert A. Ditizio