Patents by Inventor Stephen P. Sample

Stephen P. Sample has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5352123
    Abstract: A physical interconnection architecture for making connections between a plurality of first printed-circuit boards and a plurality of second printed-circuit boards includes a midplane printed-circuit board having a plurality of first connectors oriented in a first direction on one side of the midplane for making connections to the plurality of first printed-circuit boards. The midplane printed-circuit board also has a plurality of second connectors oriented in a second direction orthogonal to the plurality of first connectors on the other side of the midplane. The connectors are positioned such that connection pins on the plurality of first connectors and plurality of second connectors in regions of intersection are double-ended pins common to both. The remaining connection pins of the plurality of first connectors are single-ended connection pins which are connected to the single-ended connection pins of the plurality of second connectors via conductive traces on the midplane printed-circuit board.
    Type: Grant
    Filed: June 8, 1992
    Date of Patent: October 4, 1994
    Assignee: Quickturn Systems, Incorporated
    Inventors: Stephen P. Sample, Terry L. Goode
  • Patent number: 5329470
    Abstract: A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system a network of internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.
    Type: Grant
    Filed: December 21, 1993
    Date of Patent: July 12, 1994
    Assignee: Quickturn Systems, Inc.
    Inventors: Stephen P. Sample, Michael R. D'Amour, Thomas S. Payne
  • Patent number: 5114353
    Abstract: A connector arrangement for connecting together a plurality of circuit boards includes a plurality of side insertion connectors of a first mating type are mounted parallel to one another on parallel finger portions extending from body portions of one or more first circuit boards. A plurality of side insertion type connectors of a second mating type are mounted on a plurality of second circuit boards. The side insertion type connectors of the second type are mounted at positions and orientations on the second circuit boards chosen such that they are engageable with the mating connectors of the first type mounted on the first circuit boards. When connected by the mating connectors, the first and second circuit boards will be disposed at right angles to one another.
    Type: Grant
    Filed: March 1, 1991
    Date of Patent: May 19, 1992
    Assignee: Quickturn Systems, Incorporated
    Inventor: Stephen P. Sample
  • Patent number: 5109353
    Abstract: A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system. A network of internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.
    Type: Grant
    Filed: December 2, 1988
    Date of Patent: April 28, 1992
    Assignee: Quickturn Systems, Incorporated
    Inventors: Stephen P. Sample, Michael R. D'Amour, Thomas S. Payne
  • Patent number: 4099236
    Abstract: An integrated circuit, slave microprocessor with its bus protocol is described. The slave unit may be activated by either a master microprocessor or a DMA controller. When activated by the DMA controller, handshaking signals between the controller and slave microprocessor permit the transfer of data between these units without intervention by the master microprocessor. Unique flags permit the master processor to readily determine the status of the slave microprocessor.
    Type: Grant
    Filed: May 20, 1977
    Date of Patent: July 4, 1978
    Assignee: Intel Corporation
    Inventors: William R. Goodman, Stephen P. Sample, Allan L. Goodman