Patents by Inventor Steve Kuo

Steve Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040159828
    Abstract: A multi-resistive state element that uses a treated interface is provided. A memory plug includes at least two electrodes that sandwich a multi-resistive state element. Using different treatments on both electrode/multi-resistive state element interfaces improves the memory properties of the entire memory device.
    Type: Application
    Filed: September 19, 2003
    Publication date: August 19, 2004
    Applicant: Unity Semiconductor, Inc.
    Inventors: Darrell Rinerson, Wayne Kinney, John Sanchez, Steven W. Longcor, Steve Kuo-Ren Hsia, Edmond R. Ward, Christophe J. Chevallier
  • Publication number: 20040160806
    Abstract: Providing a reference voltage to a cross point memory array. The invention is a cross point memory array and some peripheral circuitry that, when activated, provides a reference voltage to a cross point array in order to prevent unselected conductive array lines from floating to an undesired voltage. The peripheral circuitry can be activated before, after or during selection of a specific memory plug. If the peripheral circuitry is activated during selection, only the unselected conductive array lines should be brought to the reference voltage. Otherwise, all the conductive array lines can be brought to the reference voltage.
    Type: Application
    Filed: December 26, 2002
    Publication date: August 19, 2004
    Applicant: Unity Semiconductor Corporation
    Inventors: Darrell Rinerson, Christophe J. Chevallier, Steven W. Longcor, Edmond R. Ward, Wayne Kinney, Steve Kuo-Ren Hsia
  • Publication number: 20040160808
    Abstract: Cross point memory array using distinct voltages. The invention is a cross point memory array that applies a first select voltage on one conductive array line, a second select voltage on a second conductive array line, the two conductive array lines uniquely defining a single memory plug. The magnitude of the select voltages depends upon whether a read operation or a write operation is occurring. Additionally, an unselect voltage is applied to the unselected conductive array lines. The unselect voltage can be applied before, after or during the selection process. The unselect voltage is approximately equal to the average of the first select voltage and the second select voltage.
    Type: Application
    Filed: December 26, 2002
    Publication date: August 19, 2004
    Applicant: Unity Semiconductor Corporation
    Inventors: Darrell Rinerson, Steven W. Longcor, Christophe J. Chevallier, Edmond R. Ward, Wayne Kinney, Steve Kuo-Ren Hsia
  • Publication number: 20040161888
    Abstract: A multi-resistive state material that uses dopants is provided. A multi-resistive state material can be used in a memory cell to store information. However, a multi-resistive state material may not have electrical properties that are appropriate for a memory device. Intentionally doping a multi-resistive state material to modify the electrical properties can, therefore, be desirable.
    Type: Application
    Filed: August 4, 2003
    Publication date: August 19, 2004
    Applicant: UNITY SEMICONDUCTOR CORPORATION
    Inventors: Darrell Rinerson, Wayne Kinney, Christophe J. Chevallier, Steven W. Longcor, Edmond R. Ward, Steve Kuo-Ren Hsia
  • Publication number: 20040160805
    Abstract: Providing a multi-output multiplexor. The invention is multi-output multiplexor that, depending on the control signals, allows various modulating circuits to pass no voltage, pass some voltage or pass all the voltage on one of the mulitplexor's ports., A modulating circuit can be fully turned on, partially turned on, or fully turned off. In a preferred embodiment, a gate circuit is in electrical contact with ground such that when the gate circuit is turned on and its associated modulating circuit is not passing voltage, the multiplexor output associated with the modulating circuit goes to ground.
    Type: Application
    Filed: December 26, 2002
    Publication date: August 19, 2004
    Applicant: Unity Semiconductor Corporation
    Inventors: Darrell Rinerson, Christopher J. Chevallier, Steven W. Longcor, Wayne Kinney, Edmond R. Ward, Steve Kuo-Ren Hsia
  • Publication number: 20040160847
    Abstract: Layouts of driver sets in a cross point memory array. Since both terminals of a memory cell in a cross point structure are typically used for selection purposes, dedicated driver sets are typically required for both x and y directions. By fabricating the cross point array above the driver circuitry, several different driver set layouts can be utilized that allow for varying designs.
    Type: Application
    Filed: July 1, 2003
    Publication date: August 19, 2004
    Inventors: Darrell Rinerson, Christopher J. Chevallier, Steven W. Longcor, Wayne Kinney, Edmond R. Ward, Steve Kuo-Ren Hsia
  • Patent number: 6753561
    Abstract: Cross point memory array using multiple thin films. The invention is a cross point memory array that uses conductive array lines and multiple thin films as a memory plug. The thin films of the memory plug include a memory element and a non-ohmic device. The memory element switches between resistive states upon application of voltage pulses and the non-ohmic device imparts a relatively high resistance to the memory plug upon application of low magnitude voltages.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: June 22, 2004
    Assignee: Unity Semiconductor Corporation
    Inventors: Darrell Rinerson, Steven W. Longcor, Edmond R. Ward, Steve Kuo-Ren Hsia, Wayne Kinney, Christophe J. Chevallier
  • Patent number: 5226110
    Abstract: The invention analyzes areas of conditions with an expert knowledge base of rules using plural separate nodes which fire respective rules of said knowledge base, each of said rules upon being fired altering certain of said conditions predicated upon existence of others of said conditions, the invention operating by constructing a P representation of all pairs of said rules which are input dependent or output dependent; constructing a C representation of all pairs of said rules which are communication dependent or input dependent; determining which of the rules are ready to fire by matching the predicate conditions of each rule with the conditions of said set; enabling said node means to simultaneously fire those of the rules ready to fire which are defined by said P representation as being free of input and output dependencies; and communicating from each node enabled by said enabling step the alteration of conditions by the corresponding rule to other nodes whose rules are defined by said C matrix means as b
    Type: Grant
    Filed: March 29, 1991
    Date of Patent: July 6, 1993
    Assignee: The United States of America as represened by the Administrator of the National Aeronautics and Space Administration
    Inventors: Ursula M. Schwuttke, Dan Moldovan, Steve Kuo