Patents by Inventor Steve W. Bowes

Steve W. Bowes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7463367
    Abstract: Aberration marks, which may be used in conjunction with lenses in optical photolithography systems, may assist in estimating overlay errors and optical aberrations. Aberration marks may include an inner polygon pattern and an outer polygon pattern, wherein each of the inner and outer polygon patterns include a center, and two sets of lines and spaces having a different feature size and pitch that surround the outer polygon pattern. In some embodiments, the marks can be used with scatterometry or scanning electron microscope devices.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: December 9, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Steve W. Bowes
  • Patent number: 7200950
    Abstract: The disclosed embodiments relate to calibrating a measuring device by comparing a set of master measurement data against a set of current measurement data. Adjustments are made to the measuring device based on the difference between the current measurement data and the master measurement data.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: April 10, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Steve W. Bowes
  • Patent number: 7180189
    Abstract: An aberration mark for use in an optical photolithography system, and a method for estimating overlay errors and optical aberrations. The aberration mark includes an inner polygon pattern and an outer polygon pattern, wherein each of the inner and outer polygon patterns include a center, and two sets of lines and spaces having a different feature size and pitch that surround the outer polygon pattern. The aberration mark can be used to estimate overlay errors and optical aberrations. In some embodiments, the mark can also be used with scatterometry or scanning electron microscope devices. In other embodiments, the mark can be used to monitor aberrations of a lens in an optical photolithography system.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: February 20, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Steve W. Bowes
  • Patent number: 7127319
    Abstract: Methods, systems, products and apparatuses are disclosed herein relating to registration and asymmetrically deposited films, and more specifically, to reducing asymmetrically deposited film induced registration measurement error.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: October 24, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Erik Byers, Steve W. Bowes
  • Patent number: 7064080
    Abstract: A semiconductor processing method includes forming an antireflective coating comprising Ge and Se over a substrate to be patterned. Photoresist is formed over the antireflective coating. The photoresist is exposed to actinic radiation effective to pattern the photoresist. The antireflective coating reduces reflection of actinic radiation during the exposing than would otherwise occur under identical conditions in the absence of the antireflective coating. After the exposing, the substrate is patterned through openings in the photoresist and the antireflective coating using the photoresist and the antireflective coating as a mask. In one implementation, after patterning the substrate, the photoresist and the antireflective coating are chemically etched substantially completely from the substrate using a single etching chemistry.
    Type: Grant
    Filed: February 8, 2002
    Date of Patent: June 20, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Terry L. Gilton, Steve W. Bowes, John T. Moore, Joseph F. Brooks, Kristy A. Campbell
  • Patent number: 6990743
    Abstract: The disclosed embodiments relate to calibrating a measuring device by comparing a set of master measurement data against a set of current measurement data. Adjustments are made to the measuring device based on the difference between the current measurement data and the master measurement data.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: January 31, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Steve W. Bowes
  • Patent number: 6861367
    Abstract: A semiconductor processing method includes forming an antireflective coating comprising Ge and Se over a substrate to be patterned. Photoresist is formed over the antireflective coating. The photoresist is exposed to actinic radiation effective to pattern the photoresist. The antireflective coating reduces reflection of actinic radiation during the exposing than would otherwise occur under identical conditions in the absence of the antireflective coating. After the exposing, the substrate is patterned through openings in the photoresist and the antireflective coating using the photoresist and the antireflective coating as a mask. In one implementation, after patterning the substrate, the photoresist and the antireflective coating are chemically etched substantially completely from the substrate using a single etching chemistry.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: March 1, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Terry L. Gilton, Steve W. Bowes, John T. Moore, Joseph F. Brooks, Kristy A. Campbell
  • Patent number: 6852456
    Abstract: Methods, systems, products and apparatuses are disclosed herein relating to registration and asymmetrically deposited films, and more specifically, to reducing asymmetrically deposited film induced registration measurement error.
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: February 8, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Erik Byers, Steve W. Bowes
  • Patent number: 6795747
    Abstract: Methods, systems, products and apparatuses are disclosed herein relating to registration and asymmetrically deposited films, and more specifically, to reducing asymmetrically deposited film induced registration measurement error.
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: September 21, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Erik Byers, Steve W. Bowes
  • Patent number: 6778275
    Abstract: An aberration mark for use in an optical photolithography system, and a method for estimating overlay errors and optical aberrations. The aberration mark includes an inner polygon pattern and an outer polygon pattern, wherein each of the inner and outer polygon patterns include a center, and two sets of lines and spaces having a different feature size and pitch that surround the outer polygon pattern. The aberration mark can be used to estimate overlay errors and optical aberrations. In some embodiments, the mark can also be used with scatterometry or scanning electron microscope devices. In other embodiments, the mark can be used to monitor aberrations of a lens in an optical photolithography system.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: August 17, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Steve W. Bowes
  • Publication number: 20040102046
    Abstract: A semiconductor processing method includes forming an antireflective coating comprising Ge and Se over a substrate to be patterned. Photoresist is formed over the antireflective coating. The photoresist is exposed to actinic radiation effective to pattern the photoresist. The antireflective coating reduces reflection of actinic radiation during the exposing than would otherwise occur under identical conditions in the absence of the antireflective coating. After the exposing, the substrate is patterned through openings in the photoresist and the antireflective coating using the photoresist and the antireflective coating as a mask. In one implementation, after patterning the substrate, the photoresist and the antireflective coating are chemically etched substantially completely from the substrate using a single etching chemistry.
    Type: Application
    Filed: November 21, 2003
    Publication date: May 27, 2004
    Inventors: Terry L. Gilton, Steve W. Bowes, John T. Moore, Joseph F. Brooks, Kristy A. Campbell
  • Patent number: 6730444
    Abstract: Needle comb reticle patterns for use in both critical dimension analysis and registration analysis with a registration tool are disclosed. One embodiment of a needle comb reticle pattern includes a box-in-box feature flanked on two adjacent sides by needle combs with tapered flat-tipped needles. Another embodiment of a needle comb reticle pattern includes a box-in-box feature flanked on two adjacent sides by needle combs with tapered flat-tipped needles and flanked on the other two adjacent sides by reference bars. Yet another embodiment of a needle comb reticle pattern includes two complementary needle comb reticle subpatterns, each subpattern including a box-in-box feature with four flanking needle combs. A registration tool can be used with the needle combs and reference bars to measure critical dimension of a semiconductor process. The registration tool can also be used with the box-in-box feature to measure registration between two adjacent layers during semiconductor fabrication.
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: May 4, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Steve W. Bowes
  • Publication number: 20040040165
    Abstract: The disclosed embodiments relate to calibrating a measuring device by comparing a set of master measurement data against a set of current measurement data. Adjustments are made to the measuring device based on the difference between the current measurement data and the master measurement data.
    Type: Application
    Filed: August 29, 2002
    Publication date: March 4, 2004
    Inventor: Steve W. Bowes
  • Publication number: 20030153190
    Abstract: A semiconductor processing method includes forming an antireflective coating comprising Ge and Se over a substrate to be patterned. Photoresist is formed over the antireflective coating. The photoresist is exposed to actinic radiation effective to pattern the photoresist. The antireflective coating reduces reflection of actinic radiation during the exposing than would otherwise occur under identical conditions in the absence of the antireflective coating. After the exposing, the substrate is patterned through openings in the photoresist and the antireflective coating using the photoresist and the antireflective coating as a mask. In one implementation, after patterning the substrate, the photoresist and the antireflective coating are chemically etched substantially completely from the substrate using a single etching chemistry.
    Type: Application
    Filed: February 8, 2002
    Publication date: August 14, 2003
    Inventors: Terry L. Gilton, Steve W. Bowes, John T. Moore, Joseph F. Brooks, Kristy A. Campbell
  • Patent number: 6545829
    Abstract: A system and method for minimizing critical dimension errors on imaged wafers is described. After imaging and processing one or more wafers, the various critical dimensions are determined across the imaged exposure field and compared with the target critical dimensions to ascertain average critical dimension errors. The critical dimension error distribution across the field is modeled and the necessary exposure dose corrections are calculated to compensate the critical dimension errors. A pellicle is formed with light intensity modifying regions corresponding to the calculated local dose corrections. These regions alter the amount of light which is transmitted from a light source through a semiconductor mask onto the exposure fields of the wafers. As a consequence, the critical dimensions of the printed features are altered as well. The light intensity modifying region may be formed by depositing, such as by sputtering, particles which reflect or absorb light.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: April 8, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Ulrich C. Boettiger, Scott L. Light, Steve W. Bowes
  • Patent number: 6538830
    Abstract: A system and method for minimizing critical dimension errors on imaged wafers is described. After imaging and processing one or more wafers, the various critical dimensions are determined across the imaged exposure field and compared with the target critical dimensions to ascertain average critical dimension errors. The critical dimension error distribution across the field is modeled and the necessary exposure dose corrections are calculated to compensate the critical dimension errors. A pellicle is formed with light intensity modifying regions corresponding to the calculated local dose corrections. These regions alter the amount of light which is transmitted from a light source through a semiconductor mask onto the exposure fields of the wafers. As a consequence, the critical dimensions of the printed features are altered as well. The light intensity modifying region may be formed by depositing, such as by sputtering, particles which reflect or absorb light.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: March 25, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Ulrich C. Boettiger, Scott L. Light, Steve W. Bowes
  • Publication number: 20020182516
    Abstract: Needle comb reticle patterns for use in both critical dimension analysis and registration analysis with a registration tool is disclosed. One embodiment of a needle comb reticle pattern includes a box-in-box feature flanked on two adjacent sides by needle combs with tapered flat-tipped needles. Another embodiment of a needle comb reticle pattern includes a box-in-box feature flanked on two adjacent sides by needle combs with tapered flat-tipped needles and flanked on the other two adjacent sides by reference bars. Yet another embodiment of a needle comb reticle pattern includes two complementary needle comb reticle sub-patterns each sub-pattern including a box-in-box feature with four flanking needle combs. A registration tool can be used with the needle combs and reference bars to measure critical dimension of a semiconductor process. The registration tool can also be used with the box-in-box feature to measure registration between two adjacent layers during semiconductor fabrication.
    Type: Application
    Filed: June 5, 2001
    Publication date: December 5, 2002
    Inventor: Steve W. Bowes
  • Patent number: 6486956
    Abstract: Methods, systems, products and apparatuses are disclosed herein relating to registration and asymmetrically deposited films, and more specifically, to reducing asymmetrically deposited film induced registration measurement error.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: November 26, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Erik Byers, Steve W. Bowes
  • Patent number: 6465141
    Abstract: A system and method for minimizing critical dimension errors on imaged wafers is described. After imaging and processing one or more wafers, the various critical dimensions are determined across the imaged exposure field and compared with the target critical dimensions to ascertain average critical dimension errors. The critical dimension error distribution across the field is modeled and the necessary exposure dose corrections are calculated to compensate the critical dimension errors. A pellicle is formed with light intensity modifying regions corresponding to the calculated local dose corrections. These regions alter the amount of light which is transmitted from a light source through a semiconductor mask onto the exposure fields of the wafers. As a consequence, the critical dimensions of the printed features are altered as well. The light intensity modifying region may be formed by depositing, such as by sputtering, particles which reflect or absorb light.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: October 15, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Ulrich C. Boettiger, Scott L. Light, Steve W. Bowes
  • Publication number: 20020137240
    Abstract: Methods, systems, products and apparatuses are disclosed herein relating to registration and asymmetrically deposited films, and more specifically, to reducing asymmetrically deposited film induced registration measurement error.
    Type: Application
    Filed: April 15, 2002
    Publication date: September 26, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Erik Byers, Steve W. Bowes