Patents by Inventor Steve Wells

Steve Wells has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210011809
    Abstract: Various implementations described herein relate to systems and methods for a Solid State Drive (SSD) to manage data in response to a power loss event, including writing data received from a host to a volatile storage of the SSD, detecting the power loss event before the data is written to a non-volatile storage of the SSD, storing the write commands to a non-volatile storage of the SSD, marking at least one storage location of the SSD associated with the write commands as uncorrectable, for example, after the power is restored.
    Type: Application
    Filed: September 28, 2020
    Publication date: January 14, 2021
    Applicant: Toshiba Memory Corporation
    Inventors: Nigel HORSPOOL, Steve WELLS
  • Publication number: 20200383656
    Abstract: An x-ray imaging device (10) comprising at least two substantially planar panels (20, 21), each panel comprising a plurality of x-ray emitters housed in a vacuum enclosure, wherein the at least two panels each have a central panel axis (28) and are arranged such that their central panel axes are non-parallel to one another, the device further comprising a panel retaining means and arranged such that the panel retaining means retains the at least two panels stationary in relation to an object during x-raying of the object.
    Type: Application
    Filed: November 23, 2018
    Publication date: December 10, 2020
    Applicant: Adaptix Ltd
    Inventors: Wes McKean, Steve Wells, Gil Travish
  • Patent number: 10789130
    Abstract: Various implementations described herein relate to systems and methods for a Solid State Drive (SSD) to manage data in response to a power loss event, including writing data received from a host to a volatile storage of the SSD, detecting the power loss event before the data is written to a non-volatile storage of the SSD, storing the write commands to a non-volatile storage of the SSD, marking at least one storage location of the SSD associated with the write commands as uncorrectable, for example, after the power is restored.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: September 29, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Nigel Horspool, Steve Wells
  • Publication number: 20200300123
    Abstract: Systems are provided for a crankcase ventilation duct. In one example, the crankcase ventilation duct is integrally formed with a compressor housing wherein surfaces of the compressor housing shape a passage of the crankcase ventilation duct.
    Type: Application
    Filed: March 18, 2020
    Publication date: September 24, 2020
    Inventors: Carl Stephen Newman, Pierce O'Sullivan, Steve Johnson, Ryan Wells, Sam Watton
  • Patent number: 10400626
    Abstract: A vane device for a gas turbine having an inner shroud and an outer shroud, an aerofoil arranged between the inner shroud and the outer shroud, the aerofoil and/or inner shroud and/or an outer shroud having a first layer of MCrAlY coating over a substrate, a coated surface section which is coated with a thermal barrier coating over the first layer of MCrAlY coating, a second layer of MCrAlY coating provided between the first layer of MCrAlY and the thermal barrier coating of the coated surface section.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: September 3, 2019
    Assignee: Siemens Aktiengesellschaft
    Inventors: Steve Hannam, Paul Padley, Paul Mathew Walker, Jonathan Wells
  • Patent number: 9469949
    Abstract: A wire rope road safety barrier including at least one wire rope, a plurality of posts configured to be supported in the ground along a roadside or central reservation, the posts including a cut-out provided in respective ones of the posts, and a retainer. The retainer includes an arm for embracing at least half of a circumference of the post whereby the retainer can be held on the post at a position along its length, the arm defining a plane, and a tab extending perpendicularly from the plane of the arm for retaining the at least one wire rope against the post, the tab being configured to yield at a break point at which the tab is attached to the arm when subjected to a lateral force by the at least one wire rope that exceeds a predetermined amount to permit separation of the rope from the barrier within a predetermined impact zone.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: October 18, 2016
    Assignee: Hill & Smith Limited
    Inventors: Mark Tonks, Matthew Harriman, Steve Wells
  • Publication number: 20160083917
    Abstract: A retainer (10a, 10b, 10c) for a wire rope road safety barrier, comprising a plurality of posts (14), is provided for supporting one or more wire ropes (12) above the ground. The retainer comprises an arm (16a, 16b) for embracing at least half of a circumference of the post whereby the retainer can be held on the post at a position along its length. The retainer also comprises a frangible or yieldable tab (18) extending from the arm for retaining the wire rope against the post.
    Type: Application
    Filed: December 7, 2015
    Publication date: March 24, 2016
    Applicant: Hill & Smith Limited
    Inventors: Mark Tonks, Matthew Harriman, Steve Wells
  • Patent number: 9234324
    Abstract: A retainer (10a, 10b, 10c) for a wire rope road safety barrier, includes a plurality of posts (14), for supporting one or more wire ropes (12) above the ground. The retainer includes an arm (16a, 16b) for embracing at least half of a circumference of the post whereby the retainer can be held on the post at a position along its length. The retainer also includes a frangible or yieldable tab (18) extending from the arm for retaining the wire rope against the post.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: January 12, 2016
    Assignee: Hill & Smith Limited
    Inventors: Mark Tonks, Matthew Harriman, Steve Wells
  • Publication number: 20130207060
    Abstract: A retainer (10a, 10b, 10c) for a wire rope road safety barrier, comprising a plurality of posts (14), is provided for supporting one or more wire ropes (12) above the ground. The retainer comprises an arm (16a, 16b) for embracing at least half of a circumference of the post whereby the retainer can be held on the post at a position along its length. The retainer also comprises a frangible or yieldable tab (18) extending from the arm for retaining the wire rope against the post.
    Type: Application
    Filed: June 29, 2011
    Publication date: August 15, 2013
    Applicant: HILL & SMITH LIMITED
    Inventors: Mark Tonks, Matthew Harriman, Steve Wells
  • Publication number: 20090049977
    Abstract: What is disclosed is a musical instrument that may be a single holed flute that has the tonal characteristics of a flute, but offers an infinite scale of available notes and pitch modification between the high and low limits of the single holed flute's tone production.
    Type: Application
    Filed: February 17, 2008
    Publication date: February 26, 2009
    Inventor: STEVE WELLS
  • Publication number: 20080154991
    Abstract: Embodiments and implementations of non-volatile storage system monitoring of a file system are described herein.
    Type: Application
    Filed: December 21, 2006
    Publication date: June 26, 2008
    Inventors: Kirk Davis, Dipak Patel, Pramod R. Pesara, Daniel Post, Kris R. Murray, Richard J. Durante, Steve Wells, Jack Chen, Meenakshi Pannala
  • Patent number: 6567763
    Abstract: A temperature measurement device includes at least one constant current generator to provide a first current and a second current to a temperature sensor, and a signal processing element to provide an analog output signal corresponding to a temperature of the temperature sensor based on a difference between a first voltage of the temperature sensor at the first current and a second voltage of the temperature sensor at the second current.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: May 20, 2003
    Assignee: Intel Corporation
    Inventors: Jahanshir J. Javanifard, Steve Wells, Hari Giduturi, Dave Ward
  • Publication number: 20020108045
    Abstract: An apparatus and method for preventing unauthorized updates to a non-volatile memory. A sequence of encoded values is received in a non-volatile memory device and decoded by a decoding circuit in the non-volatile memory device to generate a sequence of decoded values. The sequence of decoded values is stored in the non-volatile memory device.
    Type: Application
    Filed: March 29, 2002
    Publication date: August 8, 2002
    Inventor: Steve Wells
  • Patent number: 6408387
    Abstract: An apparatus and method for preventing unauthorized updates to a non-volatile memory. A sequence of encoded values is received in a non-volatile memory device and decoded by a decoding circuit in the non-volatile memory device to generate a sequence of decoded values. The sequence of decoded values is stored in the non-volatile memory device.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: June 18, 2002
    Assignee: Intel Corporation
    Inventor: Steve Wells
  • Patent number: 5301151
    Abstract: Circuitry for locking out a first signal generated from a first power supply while the first power supply is at or below a first voltage level is described for a non-volatile semiconductor memory. The circuitry includes a first P-type transistor P1 having a gate, a drain, and a source. The source of P1 is coupled to a second power supply, the drain of P1 is coupled to a first node and the gate of P1 is coupled to a second node. The second node provides an output signal representative of the first control signal. The circuitry also includes a first N-type transistor N1, having a gate, a drain, and a source. The drain of N1 is coupled to the first node, the source of N1 is coupled to a third, and the gate of N1 is coupled to the first control signal and to a fourth node. Included is a second N-type transistor N2, having a drain, a source and a gate. The gate of N2 is coupled a sixth node. The drain of N2 is coupled to the second node and the source of N2 is coupled to the third node.
    Type: Grant
    Filed: June 15, 1993
    Date of Patent: April 5, 1994
    Assignee: Intel Corporation
    Inventors: Steve Wells, Alan Baker