Patents by Inventor Steven A. Scheer

Steven A. Scheer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120045721
    Abstract: The invention can provide a method of processing a substrate using Double-Patterned-Shadow (D-P-S) processing sequences that can include (D-P-S) creation procedures, (D-P-S) evaluation procedures, and (D-P-S) transfer sequences. The (D-P-S) creation procedures can include deposition procedures, activation procedures, de-protecting procedures, sidewall angle (SWA) correction procedure, and Double Patterned (DP) developing procedures.
    Type: Application
    Filed: August 18, 2010
    Publication date: February 23, 2012
    Applicant: Tokyo Electron Limited
    Inventors: Wallace P. Printz, Steven Scheer
  • Publication number: 20120045722
    Abstract: The invention can provide a method of processing a substrate using Double-Patterned-Shadow (D-P-S) processing sequences that can include (D-P-S) creation procedures, (D-P-S) evaluation procedures, and (D-P-S) transfer sequences. The (D-P-S) creation procedures can include deposition procedures, activation procedures, de-protecting procedures, sidewall angle (SWA) correction procedure, and Double Patterned (DP) developing procedures.
    Type: Application
    Filed: August 18, 2010
    Publication date: February 23, 2012
    Inventors: Wallace P. Printz, Steven Scheer
  • Patent number: 8097402
    Abstract: The invention provides a method of processing a substrate using Double-Patterning (D-P) processing sequences and Electric-Field Enhanced Layers (E-FELs). The D-P processing sequences and E-FELs can be used to create lines, trenches, vias, spacers, contacts, and gate structures using a minimum number of etch processes.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: January 17, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Steven Scheer, Mark Somervell
  • Publication number: 20110269078
    Abstract: A method for patterning a substrate with extreme ultraviolet (EUV) radiation is provided. The method includes contacting a surface of the substrate with at least one surface modification agent that reacts with and bonds to the surface 402 of the substrate 401 to provide a modified surface. A layer of photoresist is formed on the modified surface, followed by exposing the layer of photoresist to a pattern of EUV radiation. The surface modification agent has a general formula: X-L-Z, where X is a leaving group; L is a linkage group including a substituted or un-substituted carbon chain having 1 to 20 carbons, a sulfur moiety, a silicon moiety, or combinations thereof; and Z is at least one of an acid functional group, a photoactive acid generator group or a halide.
    Type: Application
    Filed: April 30, 2010
    Publication date: November 3, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Benjamin M. Rathsack, Steven Scheer, Mark H. Somervell
  • Publication number: 20110205505
    Abstract: Disclosed is a method and apparatus for mitigation of photoresist line pattern collapse in a photolithography process by applying a gap-fill material treatment after the post-development line pattern rinse step. The gap-fill material dries into a solid layer filling the inter-line spaces of the line pattern, thereby preventing line pattern collapse due to capillary forces during the post-rinse line pattern drying step. Once dried, the gap-fill material is depolymerized, volatilized, and removed from the line pattern by heating, illumination with ultraviolet light, by application of a catalyst chemistry, or by plasma etching.
    Type: Application
    Filed: February 18, 2011
    Publication date: August 25, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Mark H. SOMERVELL, Benjamen M. Rathsack, Ian J. Brown, Steven Scheer, Joshua Hooge
  • Patent number: 8003305
    Abstract: A method for etching a pattern on a surface is disclosed. A mask layer is disposed over a surface and a resist is disposed over the mask layer. The resist is exposed to light through the mask exposing primary pattern and sidelobe regions. The resist is developed and the mask layer is etched according to the resist pattern. A first material is deposited over the mask layer, wherein a gap is formed beneath the material and over the primary pattern region. The material is etched back so that the gap is exposed, and the primary pattern region is etched using the first material as a mask.
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: August 23, 2011
    Assignees: International Business Machines Corporation, Infineon Technologies AG
    Inventors: Steven Scheer, Uwe Paul Schroeder
  • Patent number: 7829269
    Abstract: A method and system for patterning a substrate using a dual tone development process is described. The method comprises use of plural photo-acid generators with or without a flood exposure of the substrate to improve process latitude for the dual tone development process.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: November 9, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Carlos A. Fonseca, Mark Somervell, Steven Scheer, Wallace P. Printz
  • Publication number: 20100273099
    Abstract: A method and system for patterning a substrate using a dual tone development process is described. The method and system comprise a flood exposure of the substrate to improve process latitude for the dual tone development process.
    Type: Application
    Filed: April 27, 2009
    Publication date: October 28, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Carlos A. FONSECA, Mark SOMERVELL, Steven SCHEER
  • Publication number: 20100273111
    Abstract: A method and system for patterning a substrate using a dual tone development process is described. The method comprises use of plural photo-acid generators with or without a flood exposure of the substrate to improve process latitude for the dual tone development process.
    Type: Application
    Filed: September 22, 2009
    Publication date: October 28, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Carlos A. FONSECA, Mark SOMERVELL, Steven SCHEER, Wallace P. PRINTZ
  • Publication number: 20100273107
    Abstract: A method and system for patterning a substrate using a lithographic process, such as a dual tone development process, is described. The method comprises use of at least one photo-activated acid enhancement component to improve process latitude for the dual tone development process.
    Type: Application
    Filed: December 11, 2009
    Publication date: October 28, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Carlos A. FONSECA, Mark SOMERVELL, Steven SCHEER, Wallace P. PRINTZ
  • Patent number: 7816069
    Abstract: An antireflective coating that contains at least two polymer components and comprises chromophore moieties and transparent moieties is provided. The antireflective coating is useful for providing a single-layer composite graded antireflective coating formed beneath a photoresist layer.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: October 19, 2010
    Assignee: International Business Machines Corporation
    Inventors: Colin J. Brodsky, Sean D. Burns, Dario L. Goldfarb, Michael Lercel, David R. Medeiros, Dirk Pfeiffer, Daniel P. Sanders, Steven A. Scheer, Libor Vyklicky
  • Publication number: 20100248152
    Abstract: The invention provides a method of processing a substrate using Double-Patterning (D-P) processing sequences and Electric-Field Enhanced Layers (E-FELs). The D-P processing sequences and E-FELs can be used to create lines, trenches, vias, spacers, contacts, and gate structures using a minimum number of etch processes.
    Type: Application
    Filed: March 31, 2009
    Publication date: September 30, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Steven Scheer, Mark Somervell
  • Publication number: 20100119960
    Abstract: A method and system for patterning a substrate using a dual-tone development process is described. The method and system comprise using a resist material having a polymer backbone with a plurality of protecting groups attached thereto to improve process latitude and critical dimension uniformity for the dual-tone development process.
    Type: Application
    Filed: September 16, 2009
    Publication date: May 13, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Carlos A. Fonseca, Mark Somervell, Steven Scheer
  • Publication number: 20100075238
    Abstract: A method and system for patterning a substrate using a dual-tone development process is described. The method and system comprise using a resist material having a polymer backbone with a plurality of protecting groups attached thereto to improve process latitude and critical dimension uniformity for the dual-tone development process.
    Type: Application
    Filed: September 16, 2009
    Publication date: March 25, 2010
    Applicant: Tokyo Electron Limited
    Inventors: Carlos A. Fonseca, Mark Somervell, Steven Scheer
  • Publication number: 20100068654
    Abstract: A method of patterning a substrate using a dual-tone development process is described. The patterning method comprises forming a layer of radiation-sensitive material on a substrate, wherein the layer of radiation-sensitive material comprises a dual tone resist. Thereafter, the patterning method comprises performing one or more exposures of the layer of radiation-sensitive material to one or more patterns of radiation, wherein at least one of the one or more exposures comprises using a mask having a dual-tone mask pattern region configured for printing dual tone features and a half-tone mask pattern region configured for printing half-tone features. Furthermore, the half-tone mask pattern region is optimized for use with the dual tone resist.
    Type: Application
    Filed: December 15, 2008
    Publication date: March 18, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Carlos A. Fonseca, Mark Somervell, Steven Scheer
  • Publication number: 20100055625
    Abstract: A method for patterning a substrate is described. In particular, the invention relates to a method for double patterning a substrate using dual tone development. Further, the invention relates to optimizing a dual tone development process.
    Type: Application
    Filed: August 26, 2008
    Publication date: March 4, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Roel Gronheid, Sophie Bernard, Carlos A. Fonseca, Mark Somervell, Steven Scheer
  • Publication number: 20100055624
    Abstract: A method for patterning a substrate is described. In particular, the invention relates to a method for double patterning a substrate using dual tone development. Further, the invention relates to optimizing a dual tone development process.
    Type: Application
    Filed: August 26, 2008
    Publication date: March 4, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Roel Gronheid, Sophie Bernard, Carlos A. Fonseca, Mark Somervell, Steven Scheer
  • Patent number: 7673278
    Abstract: The invention provides apparatus and methods for processing substrates using a hot-spot library.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: March 2, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Benjamen M. Rathsack, Kathleen Nafus, Steven Scheer
  • Patent number: 7632631
    Abstract: A method is provided for forming a stable thin film on a substrate. The method includes depositing a co-polymer composition having a first component and a second component onto a substrate to form a stable film having a first thickness. The first component has first dielectric properties not enabling the first component by itself to produce the stable film having the first thickness. However, the second component has second dielectric properties which impart stability to the film at the first thickness. In a preferred embodiment, the second component includes a leaving group, and the method further includes first thermal processing the film to cause a solvent but not the leaving group to be removed from the film, after which second thermal processing is performed to at least substantially remove the leaving group from the film. As a result, the film is reduced to a second thickness smaller than the first thickness, and the film remains stable during both the first and the second thermal processing.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: December 15, 2009
    Assignee: International Business Machines Corporation
    Inventors: Steven A. Scheer, Colin J. Brodsky
  • Patent number: 7588879
    Abstract: An antireflective coating that contains at least two polymer components and comprises chromophore moieties and transparent moieties is provided. The antireflective coating is useful for providing a single-layer composite graded antireflective coating formed beneath a photoresist layer.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: September 15, 2009
    Assignee: International Business Machines Corporation
    Inventors: Colin J. Brodsky, Sean D. Burns, Dario L. Goldfarb, Michael Lercel, David R. Medeiros, Dirk Pfeiffer, Daniel P. Sanders, Steven A. Scheer, Libor Vyklicky