Patents by Inventor Steven Alfred Kummerl

Steven Alfred Kummerl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110012243
    Abstract: A lead frame (410) including a die pad (100) for mounting at least one integrated circuit (405) thereon and a plurality of lead fingers (413). The die pad (100) includes a metal including substrate (105) having a periphery that includes a plurality of sides (111-114), an intersection of the sides forming corners (115). A first plurality of grooves including least one groove (106) is formed in a top side surface of the substrate and is associated with each of the corners (115). The groove (106) has a dimension oriented at least in part at an angle of 75 to 105 degrees relative to a bisecting line (118) originating from the corners (115). A lead-frame-based packaged semiconductor device (400) includes a lead frame (410) including at least one metal comprising die pad (418) and a plurality of lead fingers (413) around the die pad (418). At least one integrated circuit (405) is mounted on the top surface of the die pad (418), and electrically connected to the plurality of lead fingers (413).
    Type: Application
    Filed: September 23, 2010
    Publication date: January 20, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kapil Heramb SAHASRABUDHE, Steven Alfred KUMMERL
  • Patent number: 7821113
    Abstract: A lead frame (410) including a die pad (100) for mounting at least one integrated circuit (405) thereon and a plurality of lead fingers (413). The die pad (100) includes a metal including substrate (105) having a periphery that includes a plurality of sides (111-114), an intersection of the sides forming corners (115). A first plurality of grooves including least one groove (106) is formed in a top side surface of the substrate and is associated with each of the corners (115). The groove (106) has a dimension oriented at least in part at an angle of 75 to 105 degrees relative to a bisecting line (118) originating from the corners (115). A lead-frame-based packaged semiconductor device (400) includes a lead frame (410) including at least one metal comprising die pad (418) and a plurality of lead fingers (413) around the die pad (418). At least one integrated circuit (405) is mounted on the top surface of the die pad (418), and electrically connected to the plurality of lead fingers (413).
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: October 26, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Kapil Heramb Sahasrabudhe, Steven Alfred Kummerl
  • Publication number: 20090294932
    Abstract: A lead frame (410) including a die pad (100) for mounting at least one integrated circuit (405) thereon and a plurality of lead fingers (413). The die pad (100) includes a metal including substrate (105) having a periphery that includes a plurality of sides (111-114), an intersection of the sides forming corners (115). A first plurality of grooves including least one groove (106) is formed in a top side surface of the substrate and is associated with each of the corners (115). The groove (106) has a dimension oriented at least in part at an angle of 75 to 105 degrees relative to a bisecting line (118) originating from the corners (115). A lead-frame-based packaged semiconductor device (400) includes a lead frame (410) including at least one metal comprising die pad (418) and a plurality of lead fingers (413) around the die pad (418). At least one integrated circuit (405) is mounted on the top surface of the die pad (418), and electrically connected to the plurality of lead fingers (413).
    Type: Application
    Filed: June 3, 2008
    Publication date: December 3, 2009
    Inventors: Kapil Heramb Sahasrabudhe, Steven Alfred Kummerl
  • Patent number: 7504713
    Abstract: A semiconductor device having a plastic package with a linear array of metal lands (202, 212) with parallel perimeter portions (203a, 213a). Pairs of adjacent lands have their facing parallel perimeter portions oriented in parallel, defining a centerline. The land perimeters have flanges remote from the surface, each flange shaped by an outline. For adjacent lands, the flanges (207b, 218, 219) of the parallel perimeter portions have asymmetrical outlines relative to the centerline and are in concord so that alternately the flange of one land diminishes its outline where the flange of the adjacent land protrudes its outline. This coordinated variation shapes the space between the adjacent flanges in a meander-like mode. Adhesive plastic material is anchored in the space to hinder a land shift along the parallel perimeter portions.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: March 17, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Jeffrey Gail Holloway, Steven Alfred Kummerl
  • Publication number: 20080169554
    Abstract: A semiconductor device having a plastic package with a linear array of metal lands (202, 212) with parallel perimeter portions (203a, 213a). Pairs of adjacent lands have their facing parallel perimeter portions oriented in parallel, defining a centerline. The land perimeters have flanges remote from the surface, each flange shaped by an outline. For adjacent lands, the flanges (207b, 218, 219) of the parallel perimeter portions have asymmetrical outlines relative to the centerline and are in concord so that alternately the flange of one land diminishes its outline where the flange of the adjacent land protrudes its outline. This coordinated variation shapes the space between the adjacent flanges in a meander-like mode. Adhesive plastic material is anchored in the space to hinder a land shift along the parallel perimeter portions.
    Type: Application
    Filed: January 16, 2007
    Publication date: July 17, 2008
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jeffrey Gail Holloway, Steven Alfred Kummerl
  • Publication number: 20080073757
    Abstract: Semiconductor dies and methods to mold lock a semiconductor die are disclosed. A disclosed example semiconductor die includes a top surface, a bottom surface, and a plurality of sides joining the top surface and the bottom surface. At least one of the sides includes an interference structure to mold lock the die in a package.
    Type: Application
    Filed: September 25, 2006
    Publication date: March 27, 2008
    Inventors: Steven Alfred Kummerl, Bernhard Peter Lange, Jeffrey Gail Holloway
  • Publication number: 20070292982
    Abstract: Methods for packaging light-sensitive semiconductor devices in packages are described in which a transparent window aligned with light-sensitive surfaces of the devices are provided. The methods of the invention include steps for affixing a transparent body to a light-sensitive surface of the semiconductor device, affixing the device to a leadframe, and placing the assembled leadframe, device, and transparent body into a mold configured for contacting the transparent body. The assembled leadframe and device are encapsulated and removed from the mold, forming a package encased in encapsulant and having a transparent window aligned with the light-sensitive surface of the device.
    Type: Application
    Filed: June 16, 2006
    Publication date: December 20, 2007
    Inventors: Jeffery Gail Holloway, Steven Alfred Kummerl, Bernard Peter Lange
  • Patent number: 7256482
    Abstract: An integrated circuit chip packaging assembly having a first and second package side. An integrated circuit chip has a substrate side and an active circuit side. The chip includes integrated circuit devices formed on the active circuit side. The active circuit side of the chip is on the first package side. The die pad has at least one runner member extending therefrom, which may be bent toward the first package side. The active circuit side of the chip is attached to the die pad. The die pad is on the first package side relative to the chip. The package mold compound is formed over the die pad, at least part of the chip, and at least part of the runner member(s). At least part of the substrate side of the chip and/or at least part of the runner member(s) may not be covered by the package mold compound.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: August 14, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Steven Alfred Kummerl, Anthony L. Coyle, Bernhard Lange
  • Patent number: 7216794
    Abstract: A device (100) and method (200) for bonding a ribbon wire (104) to a workpiece (106) comprising feeding the ribbon wire through a passageway (116) of an ultrasonic bond capillary (102) and clamping the ribbon wire against an engagement surface (120) of the bond capillary via a clamping jaw (118) operably coupled to the bond capillary. The ribbon wire (104) is bonded to the workpiece (106) along a bonding surface (112) of the bond capillary (102) and penetrated, at least partially, between the bonding surface and the engagement surface (120) of the bond capillary by a cutting tool (124). The cutting tool (124) may comprise an elongate member (126) positioned between the bonding surface (112) and engagement surface (120), and may have a cutting blade (128) positioned at a distal end (130) thereof. The cutting tool (124) may further comprise a ring cutter (132), wherein the ribbon wire passes through a ring (134) having a cutting surface (138) defined about an inner diameter thereof.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: May 15, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Bernhard P. Lange, Steven Alfred Kummerl