Abstract: A sampling based technique for eliminating duplicate data (de-duplication) stored on storage resources, is provided. According to the invention, when a new data set, e.g., a backup data stream, is received by a server, e.g., a storage system or virtual tape library (VTL) system implementing the invention, one or more anchors are identified within the new data set. The anchors are identified using a novel anchor detection circuitry in accordance with an illustrative embodiment of the present invention. Upon receipt of the new data set by, for example, a network adapter of a VTL system, the data set is transferred using direct memory access (DMA) operations to a memory associated with an anchor detection hardware card that is operatively interconnected with the storage system. The anchor detection hardware card may be implemented as, for example, a FPGA is to quickly identify anchors within the data set.

Abstract: A system and method for conveying data include the capability to determine whether a transaction request credit has been received at a computer module, the transaction request credit indicating that at least a portion of a transaction request message may be sent. The system and method also include the capability to determine, of a transaction request message is to be sent, whether at least a portion of the transaction request message may be sent and to send the at least a portion of the transaction request message if it may be sent.

Abstract: A sampling based technique for eliminating duplicate data (de-duplication) stored on storage resources, is provided. According to the invention, when a new data set, e.g., a backup data stream, is received by a server, e.g., a storage system or virtual tape library (VTL) system implementing the invention, one or more anchors are identified within the new data set. The anchors are identified using a novel anchor detection circuitry in accordance with an illustrative embodiment of the present invention. Upon receipt of the new data set by, for example, a network adapter of a VTL system, the data set is transferred using direct memory access (DMA) operations to a memory associated with an anchor detection hardware card that is operatively interconnected with the storage system. The anchor detection hardware card may be implemented as, for example, a FPGA is to quickly identify anchors within the data set.

Abstract: The present invention provides a technique, in a network storage system, for a key management module (KMM) managing security operations within the storage server using an authenticated storage module (ASM) such as a smart card of the storage server. The KMM may process encryption key information (key information) generated by an encryption engine of the storage server to associate a key with a storage object of the storage server. The processed key information may then be stored by the KMM to a key map of the ASM, for which the ASM performs security services prior to storing information to the key map. The KMM may then request key information stored in the key map from the ASM, and forward the key information to the encryption engine for performing cryptographic operations on data of the storage object.

Abstract: The present invention provides methods and apparatuses for detecting, measuring, or locating cells or substances present in even very low concentrations in vivo in subjects, using targeted magnetic nanoparticles and special magnetic systems. The magnetic systems can comprise magnetizing subsystems and sensors subsystems, including as examples SQUID sensors and atomic magnetometers. The magnetic systems can detect, measure, or location particles bound by antibodies to cells or substances of predetermined types. Example magnetic systems are capable of detecting sub-nanogram amounts of these nanoparticles.

Abstract: A cache-based storage architecture has primary and secondary storage subsystems that are controlled by first and second data layout engines to provide a high-performance storage system. The primary storage subsystem illustratively comprises non-volatile electronic storage media configured as a cache, while the secondary storage subsystem comprises magnetic storage media configured as a disk array. The data layout engines illustratively implement data layout techniques that improve read and write performance to the primary and secondary storage subsystems. To that end, the data layout engines cooperate to optimize the use of the non-volatile cache as a primary storage stage that efficiently serves random data access operations prior to substantially transposing them into sequential data access operations for permanent (or archival) storage on the disk array.

Abstract: A system and method for conveying data include the capability to determine whether a transaction request credit has been received at a computer module, the transaction request credit indicating that at least a portion of a transaction request message may be sent. The system and method also include the capability to determine, of a transaction request message is to be sent, whether at least a portion of the transaction request message may be sent and to send the at least a portion of the transaction request message if it may be sent.

Abstract: A processor may operate in one of a plurality of operating states. In a Normal operating state, the processor is not involved with a memory transaction. Upon receipt of a transaction instruction to access a memory location, the processor transitions to a Transaction operating state. In the Transaction operating state, the processor performs changes to a cache line and data associated with the memory location. While in the Transaction operating state, any changes to the data and the cache line are not visible to other processors in the computing system. These changes become visible upon the processor entering a Commit operating state in response to receipt of a commit instruction. After changes become visible, the processor returns to the Normal operating state. If an abort event occurs prior to receipt of the commit instruction, the processor transitions to an Abort operating state where any changes to the data and cache line are discarded.

Abstract: In a computing system, cache coherency is performed by selecting one of a plurality of coherency protocols for a first memory transaction. Each of the plurality of coherency protocols has a unique set of cache states that may be applied to cached data for the first memory transaction. Cache coherency is performed on appropriate caches in the computing system by applying the set of cache states of the selected one of the plurality of coherency protocols.

Abstract: A system and method for conveying data include the capability to determine whether a transaction request credit has been received at a computer module, the transaction request credit indicating that at least a portion of a transaction request message may be sent. The system and method also include the capability to determine, if a transaction request message is to be sent, whether at least a portion of the transaction request message may be sent and to send the at least a portion of the transaction request message if it may be sent.

Abstract: A processor may operate in one of a plurality of operating states. In a Normal operating state, the processor is not involved with a memory transaction. Upon receipt of a transaction instruction to access a memory location, the processor transitions to a Transaction operating state. In the Transaction operating state, the processor performs changes to a cache line and data associated with the memory location. While in the Transaction operating state, any changes to the data and the cache line is not visible to other processors in the computing system. These changes become visible upon the processor entering a Commit operating state in response to receipt of a commit instruction. After changes become visible, the processor returns to the Normal operating state. If an abort event occurs prior to receipt of the commit instruction, the processor transitions to an Abort operating state where any changes to the data and cache line are discarded.

Abstract: The present invention provides a system and method for eliminating duplicate data (de-duplication) in substantially real time using an electronic storage medium.

Abstract: The techniques introduced here include storage systems including a storage controller configured to access data and a storage subsystem including a storage device having n ports, where n is an integer greater than one, and where the storage device is configured to store the data and to make the data available to the storage controller via each of the n ports. The storage systems also include a communication fabric configured to couple the storage controller to each of the n ports of the storage device via m paths, where m is an integer greater than n, so that the storage system is configured to tolerate failure in up to m?1 paths through the communication fabric, such that the data in the storage device remains accessible to the storage controller even in the presence of failure in up to m?1 paths of the m paths.

Abstract: A cluster storage system comprises a plurality of nodes that access a shared storage, each node having two or more failover partner nodes. A primary node produces write logs for received write requests and produces parity data for the write logs (storing the parity data to local non-volatile storage). By storing parity data rather than actual write logs, the non-volatile storage space within the cluster for storing write logs is reduced. Prior to failure of the primary node, the primary node also sub-divides the write logs into two or more sub-sets and distributes the sub-sets to the two or more partner nodes for storage at non-volatile storage devices. Thus, if the primary node fails, its write logs are already distributed among the partner nodes so each partner node may perform the allotted write logs on the storage, thus improving the response time to the primary node failure.

Abstract: A method and system for serializing an enable signal designating an electronic device such as a chip to enable or disable in order to reduce the number of pins and physical signal traces required to provide connections for enable signals of multiple electronic devices, such as memory, e.g. Flash and DRAM, is described. The enable signal can be encoded to reduce the number of clock cycles to send the serialized enable signal. A device controller can serialize, encode, and send the enable signal to a decoding module using reduced number of pins and physical connections. Then the decoding module can send a decoded enable signals to individual electronic devices or chips to enable or disable.

Abstract: A system and method for prioritization of clock rates in a multi-core processor is provided. Instruction arrival rates are measured during a time interval Ti?1 to Ti by a monitoring module either internal to the processor or operatively interconnected with the processor. Using the measured instruction arrival rates, the monitoring module calculates an optimal instruction arrival rate for each core of the processor. For processors that support continuous frequency changes for cores, each core is then set to an optimal service rate. For processors that only support a discrete set of arrival rates, the optimal rates are mapped to a closest supported rate and the cores are set to the closest supported rate. This procedure is then repeated for each time interval.

Abstract: A processor may operate in one of a plurality of operating states. In a Normal operating state, the processor is not involved with a memory transaction. Upon receipt of a transaction instruction to access a memory location, the processor transitions to a Transaction operating state. In the Transaction operating state, the processor performs changes to a cache line and data associated with the memory location. While in the Transaction operating state, any changes to the data and the cache line is not visible to other processors in the computing system. These changes become visible upon the processor entering a Commit operating state in response to receipt of a commit instruction. After changes become visible, the processor returns to the Normal operating state. If an abort event occurs prior to receipt of the commit instruction, the processor transitions to an Abort operating state where any changes to the data and cache line are discarded.

Abstract: A system and method for conveying data include the capability to determine whether a transaction request credit has been received at a computer module, the transaction request credit indicating that at least a portion of a transaction request message may be sent. The system and method also include the capability to determine, if a transaction request message is to be sent, whether at least a portion of the transaction request message may be sent and to send the at least a portion of the transaction request message if it may be sent.

Abstract: A processor may operate in one of a plurality of operating states. In a Normal operating state, the processor is not involved with a memory transaction. Upon receipt of a transaction instruction to access a memory location, the processor transitions to a Transaction operating state. In the Transaction operating state, the processor performs changes to a cache line and data associated with the memory location. While in the Transaction operating state, any changes to the data and the cache line is not visible to other processors in the computing system. These changes become visible upon the processor entering a Commit operating state in response to receipt of a commit instruction. After changes become visible, the processor returns to the Normal operating state. If an abort event occurs prior to receipt of the commit instruction, the processor transitions to an Abort operating state where any changes to the data and cache line are discarded.

Abstract: A hybrid media storage architecture has a log-structured file system configured to control a plurality of different storage media organized as hybrid storage media that cooperate to provide a total storage space of a storage system. The log-structured file system is configured to perform initial placement and migration of data, as well as fine-grain write allocation of the data, among storage space locations of the hybrid storage media to thereby improve the performance characteristics of the media. By defining and implementing heuristics and policies directed to, e.g., types of data, the file system may initially place data on any of the different media and thereafter migrate data between the media at fine granularity and without the need for manual enforcement.