Abstract: A power converter assembly is provided and includes high quality factor (Q) shield-to-transistor integrated low-inductance capacitor elements to divert common mode (CM) currents, high Q shield-to-shield integrated low-inductance capacitor elements to compliment line-to-line filter capacitors and high Q baseplate integrated low-inductance capacitor elements to attenuate residual CM currents.

Abstract: A power converter assembly is provided and includes high quality factor (Q) shield-to-transistor integrated low-inductance capacitor elements to divert common mode (CM) currents, high Q shield-to-shield integrated low-inductance capacitor elements to compliment line-to-line filter capacitors and high Q baseplate integrated low-inductance capacitor elements to attenuate residual CM currents.

Abstract: A power converter with ground fault protection (PCGFP) circuit includes an input stage, a first voltage converter, and an output stage. The input stage is connected to a power bus to receive an input direct current (DC) voltage. The first voltage converter converts the input DC voltage to a second voltage and switches between an open and closed state to regulate power present on the power bus. The output stage includes a second voltage converter circuit to generate an output voltage having a different voltage level from the input DC voltage. A controller controls operation of the first and second voltage converters and is also capable of detecting a ground fault on the power bus. The controller operates the first and second voltage converts in a fault isolation mode in response to detecting the ground fault such that the first and second voltage converters isolate the ground fault.

Abstract: A power converter with ground fault protection (PCGFP) circuit includes an input stage, a first voltage converter, and an output stage. The input stage is connected to a power bus to receive an input direct current (DC) voltage. The first voltage converter converts the input DC voltage to a second voltage and switches between an open and closed state to regulate power present on the power bus. The output stage includes a second voltage converter circuit to generate an output voltage having a different voltage level from the input DC voltage. A controller controls operation of the first and second voltage converters and is also capable of detecting a ground fault on the power bus. The controller operates the first and second voltage converts in a fault isolation mode in response to detecting the ground fault such that the first and second voltage converters isolate the ground fault.

Abstract: A power converter assembly is provided and includes high quality factor (Q) shield-to-transistor integrated low-inductance capacitor elements to divert common mode (CM) currents, high Q shield-to-shield integrated low-inductance capacitor elements to compliment line-to-line filter capacitors and high Q baseplate integrated low-inductance capacitor elements to attenuate residual CM currents.

Abstract: A modular high-power converter system includes an electronic power distribution unit configured to output an analog current (AC) voltage to a power bus, and at least one Transmit or Receive Integrated Microwave Module (T/RIMM) that includes a voltage converter unit and a transmitter and receiver (T/R) unit. The voltage converter unit includes at least one analog-to-digital converter (ADC) to convert the AC voltage into a direct current (DC) voltage having a first DC voltage level. The transmitter and receiver (T/R) unit includes a modular-based DC/DC converter to convert the DC voltage into a second DC voltage having a second voltage. The modular-based DC/DC converter includes a modular power converter unit configured to generate the second DC voltage. The modular converter unit is configured to be independently interchangeable with a different modular converter unit.

Abstract: A power converter assembly is provided and includes high quality factor (Q) shield-to-transistor integrated low-inductance capacitor elements to divert common mode (CM) currents, high Q shield-to-shield integrated low-inductance capacitor elements to compliment line-to-line filter capacitors and high Q baseplate integrated low-inductance capacitor elements to attenuate residual CM currents.

Abstract: A modular high-power converter system includes an electronic power distribution unit configured to output an analog current (AC) voltage to a power bus, and at least one Transmit or Receive Integrated Microwave Module (T/RIMM) that includes a voltage converter unit and a transmitter and receiver (T/R) unit. The voltage converter unit includes at least one analog-to-digital converter (ADC) to convert the AC voltage into a direct current (DC) voltage having a first DC voltage level. The transmitter and receiver (T/R) unit includes a modular-based DC/DC converter to convert the DC voltage into a second DC voltage having a second voltage. The modular-based DC/DC converter includes a modular power converter unit configured to generate the second DC voltage. The modular converter unit is configured to be independently interchangeable with a different modular converter unit.

Abstract: A rear-loaded electronics array, comprising a first circuit board assembly comprising a rail and at least one slat assembly. The at least one slat assembly can be operable to be removed from the rail and replaced on the rail from a rearward position. A second circuit board assembly can comprise a rail and at least one slat assembly. The at least one slat assembly can be operable to be removed from the rail and replaced on the rail from a rearward position. The first circuit board assembly can be positioned adjacent the second circuit board assembly, and the first circuit board assembly can be coupled to the second circuit board assembly, thus forming the rear-loaded electronics array. The first and second circuit board assemblies can be installed and removed independent of one another, as well as each of the individual slat assemblies from any circuit board assembly.

Abstract: A stacked magnetic power converter assembly includes a plurality of converter modules disposed in a stacked arrangement with respect to one another to define a thickness of stacked magnetic power converter assembly. Each converter module includes a primary switching unit, a secondary switching unit, and a converter unit. The converter unit includes a primary terminal in signal communication with the primary switching unit and a secondary terminal in signal communication with the secondary switching unit. Each primary switching unit, each secondary switching unit, and each converter unit is shared among the plurality of converter modules.

Abstract: A stacked magnetic power converter assembly includes a plurality of converter modules disposed in a stacked arrangement with respect to one another to define a thickness of stacked magnetic power converter assembly. Each converter module includes a primary switching unit, a secondary switching unit, and a converter unit. The converter unit includes a primary terminal in signal communication with the primary switching unit and a secondary terminal in signal communication with the secondary switching unit. Each primary switching unit, each secondary switching unit, and each converter unit is shared among the plurality of converter modules.

Abstract: A structure, comprising: a semiconductor structure having an electrically and thermally conductive layer disposed on one surface of the semiconductor structure; an electrically and thermally conductive heat sink; a electrically and thermally conductive carrier layer; a plurality of electrically and thermally nano-tubes, a first portion of the plurality of nano-tubes having proximal ends disposed on a first surface of the carrier layer and a second portion of the plurality of nano-tubes having proximal ends disposed on an opposite surface of the carrier layer; and a plurality of electrically and thermally conductive heat conductive tips disposed on distal ends of the plurality of nano-tubes, the plurality of heat conductive tips on the first portion of the plurality of nano-tubes being attached to the conductive layer, the plurality of heat conductive tips on the second portion of the plurality of nano-tubes being attached to the heat sink.

Abstract: In one aspect, a device includes a gallium nitride (GaN) layer, a first diamond layer disposed on the GaN layer, a gate structure disposed in contact with the GaN layer and the first diamond layer, and a second diamond layer having a first thermal conductivity and disposed on a second surface of the GaN layer. The gate and the first diamond layer are disposed on a first surface of the GaN layer opposite the second surface of the GaN layer.

Abstract: A structure, comprising: a semiconductor structure having an electrically and thermally conductive layer disposed on one surface of the semiconductor structure; an electrically and thermally conductive heat sink; a electrically and thermally conductive carrier layer; a plurality of electrically and thermally nano-tubes, a first portion of the plurality of nano-tubes having proximal ends disposed on a first surface of the carrier layer and a second portion of the plurality of nano-tubes having proximal ends disposed on an opposite surface of the carrier layer; and a plurality of electrically and thermally conductive heat conductive tips disposed on distal ends of the plurality of nano-tubes, the plurality of heat conductive tips on the first portion of the plurality of nano-tubes being attached to the conductive layer, the plurality of heat conductive tips on the second portion of the plurality of nano-tubes being attached to the heat sink.

Abstract: A semiconductor structure having: an electrically and thermally conductive layer disposed on one surface of the semiconductor structure; an electrically and thermally conductive heat sink; a electrically and thermally conductive carrier layer; a plurality of electrically and thermally nano-tubes, a first portion of the plurality of nano-tubes having proximal ends disposed on a first surface of the carrier layer and a second portion of the plurality of nano-tubes having proximal ends disposed on an opposite surface of the carrier layer; and a plurality of electrically and thermally conductive heat conductive tips disposed on distal ends of the plurality of nano-tubes, the plurality of heat conductive tips on the first portion of the plurality of nano-tubes being attached to the conductive layer, the plurality of heat conductive tips on the second portion of the plurality of nano-tubes being attached to the heat sink.

Abstract: In one aspect, a method includes fabricating a device. The device includes a gallium nitride (GaN) layer, a diamond layer disposed on the GaN layer and a gate structure disposed in contact with the GaN layer and the diamond layer. In another aspect, a device includes a gallium nitride (GaN) layer, a diamond layer disposed on the GaN layer and a gate structure disposed in contact with the GaN layer and the diamond layer.

Abstract: In one aspect, a method includes fabricating a device. The device includes a gallium nitride (GaN) layer, a diamond layer disposed on the GaN layer and a gate structure disposed in contact with the GaN layer and the diamond layer. In another aspect, a device includes a gallium nitride (GaN) layer, a diamond layer disposed on the GaN layer and a gate structure disposed in contact with the GaN layer and the diamond layer.

Abstract: A heterostructure having a heterojunction comprising: a diamond layer; and a boron aluminum nitride (B(x)Al(1-x)N) layer disposed in contact with a surface of the diamond layer, where x is between 0 and 1.

Abstract: A structure including a TiW oxygen plasma mask, a photoresist mask above and in contact with the TiW oxygen plasma mask, a 2000 angstrom thick oxygen plasma vaporizable RuO0.8 electrode layer partially under and in contact with the TiW oxygen plasma mask, the RuO0.8 electrode layer not being completely covered by a pattern of the TiW oxygen plasma mask, a first side of a PZT ferroelectric layer in contact with the RuO0.8 electrode layer and a second RuO0.8 electrode layer in contact with a second side of the PZT ferroelectric layer.

Abstract: In one aspect, a method includes fabricating a gallium nitride (GaN) layer with a first diamond layer having a first thermal conductivity and a second diamond layer having a second thermal conductivity greater than the first thermal conductivity. The fabricating includes using a microwave plasma chemical vapor deposition (CVD) process to deposit the second diamond layer onto the first diamond layer.