Patents by Inventor Steven D. Draving
Steven D. Draving has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11674993Abstract: A method and system measure a characteristic of a signal under test (SUT) using a signal measurement device. The method includes receiving and digitizing the first and second copies of the SUT through first and second input channels to obtain first and second digitized waveforms; repeatedly determining measurement values of the SUT characteristic in the first and second digitized waveforms to obtain first and second measurement values, which are paired in measurement value pairs; multiplying the first and second measurement values in each of the measurement value pairs to obtain measurement products; determining an average value of the measurement products to obtain an MSV of the measured SUT characteristic; and determine a square root of the MSV to obtain an RMS value of the measured SUT characteristic. The RMS value substantially omits variations not in the SUT, which are introduced by only one of the first and second input channels.Type: GrantFiled: November 29, 2021Date of Patent: June 13, 2023Assignee: KEYSIGHT TECHNOLOGIES, INC.Inventor: Steven D. Draving
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Patent number: 11536761Abstract: A method and system measure a characteristic of a signal under test (SUT) using a signal measurement device. The method includes receiving the SUT through first and second input channels; digitizing first and second copies of the SUT to obtain first and second digitized waveforms; repeatedly determining first and second measurement trends to obtain measurement trend pairs; cross-correlating the first and second measurement trends in each measurement trend pair to obtain cross-correlation vectors; extracting zero-displacement values from the cross-correlation vectors, respectively; summing the zero-displacement values to obtain a sum of measurement products for the measurement trend pairs; divide the sum of zero-displacement values by a total number of measurement products to obtain an average value of the measurement products, corresponding to MSV of the measured SUT characteristic; and determining a square root of the average value of the MSV to obtain an RMS value of the measured SUT characteristic.Type: GrantFiled: November 29, 2021Date of Patent: December 27, 2022Assignee: Keysight Technologies, Inc.Inventor: Steven D. Draving
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Publication number: 20220082603Abstract: A method and system measure a characteristic of a signal under test (SUT) using a signal measurement device. The method includes receiving and digitizing the first and second copies of the SUT through first and second input channels to obtain first and second digitized waveforms; repeatedly determining measurement values of the SUT characteristic in the first and second digitized waveforms to obtain first and second measurement values, which are paired in measurement value pairs; multiplying the first and second measurement values in each of the measurement value pairs to obtain measurement products; determining an average value of the measurement products to obtain an MSV of the measured SUT characteristic; and determine a square root of the MSV to obtain an RMS value of the measured SUT characteristic. The RMS value substantially omits variations not in the SUT, which are introduced by only one of the first and second input channels.Type: ApplicationFiled: November 29, 2021Publication date: March 17, 2022Inventor: Steven D. Draving
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Publication number: 20220082604Abstract: A method and system measure a characteristic of a signal under test (SUT) using a signal measurement device. The method includes receiving the SUT through first and second input channels; digitizing first and second copies of the SUT to obtain first and second digitized waveforms; repeatedly determining first and second measurement trends to obtain measurement trend pairs; cross-correlating the first and second measurement trends in each measurement trend pair to obtain cross-correlation vectors; extracting zero-displacement values from the cross-correlation vectors, respectively; summing the zero-displacement values to obtain a sum of measurement products for the measurement trend pairs; divide the sum of zero-displacement values by a total number of measurement products to obtain an average value of the measurement products, corresponding to MSV of the measured SUT characteristic; and determining a square root of the average value of the MSV to obtain an RMS value of the measured SUT characteristic.Type: ApplicationFiled: November 29, 2021Publication date: March 17, 2022Inventor: Steven D. Draving
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Patent number: 11255893Abstract: A method measures a characteristic of a SUT using a signal measurement device having multiple input channels. The method includes digitizing first and second copies of the SUT in first and second input channels to obtain first and second digitized waveforms; repeatedly determining measurement values of the SUT characteristic in the first and second digitized waveforms to obtain first and second measurement values, respectively, each second measurement value being paired with a first measurement value to obtain measurement value pairs; multiplying the first and second measurement values in each of the measurement value pairs to obtain measurement products; determining a mean-squared value (MSV) of the SUT characteristic measurement; and determining a square root of the MSV to obtain a root-mean-squared (RMS) value of the measured SUT characteristic, which substantially omits variations not in the SUT, which are introduced by only one of the first or second input channel.Type: GrantFiled: August 22, 2018Date of Patent: February 22, 2022Assignee: Keysight Technologies, Inc.Inventor: Steven D. Draving
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Publication number: 20200064386Abstract: A method measures a characteristic of a SUT using a signal measurement device having multiple input channels. The method includes digitizing first and second copies of the SUT in first and second input channels to obtain first and second digitized waveforms; repeatedly determining measurement values of the SUT characteristic in the first and second digitized waveforms to obtain first and second measurement values, respectively, each second measurement value being paired with a first measurement value to obtain measurement value pairs; multiplying the first and second measurement values in each of the measurement value pairs to obtain measurement products; determining a mean-squared value (MSV) of the SUT characteristic measurement; and determining a square root of the MSV to obtain a root-mean-squared (RMS) value of the measured SUT characteristic, which substantially omits variations not in the SUT, which are introduced by only one of the first or second input channel.Type: ApplicationFiled: August 22, 2018Publication date: February 27, 2020Inventor: Steven D. Draving
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Patent number: 10142066Abstract: Various illustrative embodiments pertain to a signal quality evaluation system having a decision feedback equalizer (DFE) and a signal quality evaluator. The DFE receives an input signal containing symbols that represent digital data and uses the symbols to generate multiple detection thresholds. Each detection threshold is one of several detection thresholds that can be generated by the DFE by processing one or more symbols present in the input signal prior to a current clock cycle of a clock that is recovered from the input signal. The signal quality evaluator uses the detection thresholds provided by the DFE to detect transitions in the input signal. The signal quality evaluator may execute jitter measurements and/or time interval error (TIE) measurements by evaluating the transitions in the input signal.Type: GrantFiled: August 7, 2017Date of Patent: November 27, 2018Assignee: Keysight Technologies, Inc.Inventors: Steven D. Draving, Christopher P. Duff
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Patent number: 8223830Abstract: A system for filtering a data signal includes an input configured to receive the data signal through a transmission medium and a filter configured to remove distortion from the received data signal using equalization coefficients. The system further includes a processing unit configured to determine dynamically the equalization coefficients of the filter without using a predetermined training pattern in the received data signal.Type: GrantFiled: June 18, 2009Date of Patent: July 17, 2012Assignee: Agilent Technologies, Inc.Inventor: Steven D. Draving
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Publication number: 20100322299Abstract: A system for filtering a data signal includes an input configured to receive the data signal through a transmission medium and a filter configured to remove distortion from the received data signal using equalization coefficients. The system further includes a processing unit configured to determine dynamically the equalization coefficients of the filter without using a predetermined training pattern in the received data signal.Type: ApplicationFiled: June 18, 2009Publication date: December 23, 2010Applicant: AGILENT TECHNOLOGIES, INC.Inventor: Steven D. Draving
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Patent number: 7480329Abstract: Separation and analysis of measured Total Jitter (TJ) begins with a suitably long arbitrary digital test pattern, from which an Acquisition Record is made. A Time Interval Error (TIE) or Voltage Level Error (VLE) Record is made of the Acquisition Record. A Template defines a collection of associated bit value or transitions that are nearby or otherwise related to a bit location of interest, and has associated therewith a collection of Descriptors and their respective Metrics. Each Descriptor identifies one of the various different patterns of bit value or transitions that fit the Template. The TIE/VLE Record is examined, and a parameter is measured for each instance of each Descriptor for the Template. The collection of measured parameters for each particular Descriptor are combined (e.g., averaging) to produce the Metric for that Descriptor.Type: GrantFiled: October 29, 2004Date of Patent: January 20, 2009Assignee: Agilent Technologies, Inc.Inventors: Steven D. Draving, Allen Montijo
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Patent number: 7480355Abstract: Equalized Acquisition Record are prepared from Original Acquisition Records reflecting Total Jitter and from an existing description of DDJ. Removal of timing DDJ alters the locations of edges associated with data events. Voltage DDJ adjusts the asserted voltage in the central portion of a Unit Interval. One technique for equalizing timing jitter variably interpolates along the existing Original Acquisition Record to discover plausible new voltage values to assign to existing sample locations along the time axis. Another technique construes the desired amount of correction for each data event as an impulse that is applied to a Finite Impulse Response Filter whose output is a Voltage Correction Waveform having a smoothed voltage excursion. Time variant voltage values output from the Finite Impulse Response Filter are collected into a Voltage Correction Waveform Record having entry times found in the Original Acquisition Record.Type: GrantFiled: February 16, 2005Date of Patent: January 20, 2009Assignee: Agilent Technologies, Inc.Inventors: Steven D Draving, Allen Montijo
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Patent number: 7460591Abstract: Measurement of jitter in a system uses a digital test sequence including many repetitions of a test pattern. An Acquisition Record is made of the entire test sequence. A complete Time Interval Error (TIE) Record is made of the Acquisition Record. The complete TIE Record is separated into a collection of Component TIE Records, one for each transition in the test pattern, and that collectively contain all the different instances in the test sequence of that transition in the test pattern. An FFT is performed on each component TIE Record, and the component FFTs are processed to obtain timing jitter data for the digital signal.Type: GrantFiled: August 30, 2004Date of Patent: December 2, 2008Assignee: Agilent Technologies, Inc.Inventors: Steven D. Draving, Allen Montijo
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Publication number: 20080056341Abstract: Simultaneously measurements of jitter in a high speed signal expected to exhibit both short and long period jitter are made even when the amount of acquisition memory is fixed and cannot be increased to allow storage of consecutive uninterrupted high speed samples for the duration of the longest period. The signal is sampled in repetitive bursts whose sample rate within a burst is high, but whose time between bursts is long enough to prevent a Segmented Acquisition Memory being filled, and a Segmented Acquisition Record from being completed, until a period of time that is long enough to encompass measurement of the long period jitter has transpired. The Segmented Acquisition Record is analyzed by a technique that tolerates the ‘natural holes’ in a TIE Record caused by the absence of a transition between consecutive identical logical values.Type: ApplicationFiled: August 31, 2006Publication date: March 6, 2008Inventor: Steven D. Draving
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Patent number: 7251572Abstract: Discovery of RJ assumes an Adjusted TIE Record for TJ from which DDJ has been removed. What remains is PJ+RJ, from whose Fourier Transform PJ is ‘synthetically de-convolved’ to leave just RJ: Calculate the Power Density Spectrum of PJ+RJ, and determine a threshold that indicates a PJ component. Identify in the PDS the largest frequency component that exceeds the threshold, otherwise there is no significant PJ and PJ+RJ can be taken as RJ. If a frequency component exceeds the threshold, take the largest and calculate what the convolution of it with the FT of the Transition Pattern would be if this circumstance were to occur in isolation, and then remove it from PJ+RJ. Repeat with continued iterations, until there are no further PJ components.Type: GrantFiled: July 14, 2006Date of Patent: July 31, 2007Assignee: Agilent Technologies, Inc.Inventors: Steven D Draving, Allen Montijo
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Patent number: 7248982Abstract: Discovery of DDJ within measured Total Jitter (TJ) begins with a suitably long digital Test Pattern, from which an Acquisition Record is made. A Time Interval Error/Voltage Error Record is made of the Acquisition Record. A Template defines a collection of associated bit value or transitions that are nearby or otherwise related to a bit location of interest, and through the applied test pattern produces a sequence of Data Symbols. The TIE/VLE Record is examined, and a parameter is measured for each Data Symbol as it occurs in the Test Pattern. A regression technique may be use to find coefficients for a DDJ Calculator whose inputs are the Data Symbols and whose output is respective values of DDJ. Subsequent separation of DDJ from TJ is possible because DDJ is correlated with the Data Symbols, while Periodic Jitter (PJ) and Random Jitter (RJ) can be expected to average to near zero over a sufficient number of instances of a given Data Symbol.Type: GrantFiled: June 29, 2006Date of Patent: July 24, 2007Assignee: Agilent Technologies, Inc.Inventors: Steven D Draving, Allen Montijo
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Patent number: 6898535Abstract: A method and apparatus for analyzing jitter in a signal. The signal is buffered to form a sequence of signal vectors and a time interval error function is calculated for each the signal vector. A time interval error spectrum is then calculated by transforming the time interval error function using a discrete Fourier transform. An average time interval error spectrum and an average power spectral density function are then calculated as averages of the amplitude of the time interval error spectrum and its amplitude squared, respectively. Parameters of the signal jitter are estimated from the average time interval error spectrum and the average power spectral density function.Type: GrantFiled: October 14, 2003Date of Patent: May 24, 2005Assignee: Agilent Technologies, Inc.Inventor: Steven D. Draving
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Publication number: 20040183518Abstract: A digital storage oscilloscope that has a port for receiving a signal, having an embedded clock signal, and a processor, configured by software to recover the embedded clock signal from the signal. In a preferred embodiment, the processor implements a digital PLL to recovered embedded clock signal. In a further preferred embodiment the processor uses the recovered embedded clock signal to generate an eye diagram that graphically portrays jitter in the data signal.Type: ApplicationFiled: March 19, 2003Publication date: September 23, 2004Inventors: Dennis J. Weller, Steven D. Draving
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Patent number: 6753677Abstract: Trigger jitter in an internally triggered real time digital oscilloscope can be reduced through correcting the horizontal position value obtained from a conventional trigger interpolation mechanism by an error or substitute amount learned from an inspection of the acquisition record that notes where in the acquisition record the signal actually crossed the trigger threshold. The display (and measurement) sub-systems that utilize the selection by panning and zooming of a portion of the acquisition record for viewing (and measurement) are supplied with the acquisition record portion of interest, and with an associated horizontal position value that originates with trigger interpolation and that may be subsequently modified by panning.Type: GrantFiled: February 28, 2003Date of Patent: June 22, 2004Assignee: Agilent Technologies, Inc.Inventors: Dennis J Weller, Steven D Draving, Ralph Urban
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Patent number: 6483284Abstract: A probe apparatus for use with analyzing devices, primarily oscilloscopes and logic analyzers, which uses pole-zero cancellation to provide a probe with low capacitance and wide bandwidth. Pole-zero cancellation enables the probe to have constant gain at all frequencies. In one embodiment, the coaxial cable between the probe tip and the replication amplifier is terminated in its characteristic impedance to provide constant gain at all frequencies regardless of cable length. Use of pole-zero cancellation and thick film technology enables building a probe with a small, durable tip.Type: GrantFiled: June 20, 2001Date of Patent: November 19, 2002Assignee: Agilent Technologies, Inc.Inventors: David D. Eskeldson, Steven D Draving, Kenneth Rush
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Patent number: 6378757Abstract: Edge mounting flexible media to a rigid PC board construction can be achieved by various methods. In any method used, there is a desire to create solderable pads on the edge of the rigid PC board. In accordance with the invention, the solderable pads are created by edge plating the PC Board or by a sliced via method. Depending on the type of flexible transmission line used, the construction will differ accordingly. For terminating flexible circuit media, the flex pads are laid out in such a way that the pads are etched in a configuration that matches up with the edge pads on the rigid PC Board. Solder past is then applied to the pads on the flex. The rigid PC Board is fixtured at a right angle to the flex and run through the reflow oven.Type: GrantFiled: January 31, 2001Date of Patent: April 30, 2002Assignee: Agilent Technologies, Inc.Inventors: Brent A. Holcombe, Steven D Draving