Patents by Inventor Steven D. Draving

Steven D. Draving has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6362635
    Abstract: Disclosed is a system and method for probing target pads in a dense pad array while minimizing distortion of a signal on the pads probed due to the probe load on the target pads and minimizing an amount of cross-talk between aggressor conductors in the dense pad array and the probe tip. In one embodiment, a probe tip arrangement is provided comprising a pad located in a dense pad array and a first probe tip resistor having first and second ends, the first end being coupled to the pad. The first probe tip resistor is positioned directly adjacent to the pad as closely as manufacturing processes will allow. The probe tip arrangement further includes an access transmission line coupled to the second end of the first probe tip resistor and extending outside of the dense pad array to a second probe tip resistor The second probe tip resistor may, in turn, be coupled to an electrical connector which in turn is coupled to a logic analyzer or oscilloscope to test the signal on the respective pad of the pad array.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: March 26, 2002
    Assignee: Agilent Technologies, Inc.
    Inventors: Steven D Draving, John C Kerley
  • Patent number: 6362614
    Abstract: An electronic probe has a termination portion, a filter, and an impedance device. The termination portion is connected between a transmission line end and a common node. The termination portion has a termination resistor and a termination capacitor connected in series between the transmission line end and the common node. The filter has a resistor connected in parallel with a capacitor and an inductor connected in series with the filter resistor and filter capacitor combination. The components are connected between the transmission line end and an output. An impedance device is connected between the output and the common node. A zero is associated with the termination portion and a pole is associated with the filter. The frequency of the zero is approximately equal to the frequency of the pole. The probe provides a device for measuring tri-state logic circuits without overloading the circuits.
    Type: Grant
    Filed: January 5, 2001
    Date of Patent: March 26, 2002
    Assignee: Agilent Technologies, Inc.
    Inventor: Steven D Draving
  • Publication number: 20010024116
    Abstract: An electronic probe has a termination portion, a filter, and an impedance device. The termination portion is connected between a transmission line end and a common node. The termination portion has a termination resistor and a termination capacitor connected in series between the transmission line end and the common node. The filter has a resistor connected in parallel with a capacitor and an inductor connected in series with the filter resistor and filter capacitor combination. The components are connected between the transmission line end and an output. An impedance device is connected between the output and the common node. A zero is associated with the termination portion and a pole is associated with the filter. The frequency of the zero is approximately equal to the frequency of the pole. The probe provides a device for measuring tri-state logic circuits without overloading the circuits.
    Type: Application
    Filed: January 5, 2001
    Publication date: September 27, 2001
    Inventor: Steven D. Draving
  • Patent number: 6262602
    Abstract: A comparator detects rising transitions of an input waveform and another comparator detects falling transitions. Each comparator detects their respective transition with a different threshold voltage. The outputs of these comparators are multiplexed into the clock input of a flip-flop. The flip-flop's inverted output is connected through a time delay to the input of the flip-flop to form a toggling configuration. The output of the time delay is also connected to the select input of a multiplexer that controls the multiplexer to multiplex the outputs of the two comparators into the clock input of the flip-flop. The threshold voltages chosen for the two comparators are chosen to be in the center of the incident edges of the distorted signal of a source-terminated transmission line. The time delay is chosen to be longer than the difference between the arrival of the incident wave and the arrival of the first reflected wave.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: July 17, 2001
    Assignee: Agilent Technologies, Inc.
    Inventor: Steven D. Draving
  • Publication number: 20010002794
    Abstract: Disclosed is a system and method for probing target pads in a dense pad array while minimizing distortion of a signal on the pads probed due to the probe load on the target pads and minimizing an amount of cross-talk between aggressor conductors in the dense pad array and the probe tip. In one embodiment, a probe tip arrangement is provided comprising a pad located in a dense pad array and a first probe tip resistor having first and second ends, the first end being coupled to the pad. The first probe tip resistor is positioned directly adjacent to the pad as closely as manufacturing processes will allow. The probe tip arrangement further includes an access transmission line coupled to the second end of the first probe tip resistor and extending outside of the dense pad array to a second probe tip resistor. The second probe tip resistor may, in turn, be coupled to an electrical connector which in turn is coupled to a logic analyzer or oscilloscope to test the signal on the respective pad of the pad array.
    Type: Application
    Filed: January 29, 2001
    Publication date: June 7, 2001
    Inventors: Steven D. Draving, John C. Kerley
  • Patent number: 6225816
    Abstract: Disclosed is a system and method for probing target pads in a dense pad array while minimizing distortion of a signal on the pads probed due to the probe load on the target pads and minimizing an amount of cross-talk between aggressor conductors in the dense pad array and the probe tip. In one embodiment, a probe tip arrangement is provided comprising a pad located in a dense pad array and a first probe tip resistor having first and second ends, the first end being coupled to the pad. The first probe tip resistor is positioned directly adjacent to the pad as closely as manufacturing processes will allow. The probe tip arrangement further includes an access transmission line coupled to the second end of the first probe tip resistor and extending outside of the dense pad array to a second probe tip resistor. The second probe tip resistor may, in turn, be coupled to an electrical connector which in turn is coupled to a logic analyzer or oscilloscope to test the signal on the respective pad of the pad array.
    Type: Grant
    Filed: April 8, 1999
    Date of Patent: May 1, 2001
    Assignee: Agilent Technologies, Inc.
    Inventors: Steven D Draving, John C Kerley
  • Patent number: 6175228
    Abstract: An improved probe for probing high speed, low impedance bus structures. The probe comprises an AC termination portion and an RCR filter. In a first embodiment, the AC termination portion comprises a resistor and capacitor in series. The time constant formed by the AC termination portion is sufficiently larger than the time it takes a signal to travel through the cable of the probe. The RCR filter comprises two resistors in series disposed between the AC termination resistor and ground. A capacitor is connected in parallel to the first resistor in order to achieve a flat pulse response from DC through to high frequencies.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: January 16, 2001
    Assignee: Agilent Technologies
    Inventors: Thomas J. Zamborelli, Steven D. Draving
  • Patent number: 5315627
    Abstract: A pseudo-random repetitive sampling circuit which is capable of sampling fast signals, sampling negative and positive time around a trigger event, and rapidly building the waveform for display. The circuit accomplishes this by acquiring negative and positive time in two different ways. Positive time information is acquired using a modified form of sequential sampling, since sequential sampling can rapidly build the signal for samples that occur after the trigger event. The system also may take multiple samples for each trigger event. For samples occurring prior to the trigger event, the system uses a modified form of random repetitive sampling. The modification comprises sampling of the waveform prior to allowing any trigger events to occur, and qualifying each trigger event so that a trigger event is only recognized when it occurs in a programmable time window after a sample.
    Type: Grant
    Filed: February 22, 1993
    Date of Patent: May 24, 1994
    Assignee: Hewlett-Packard Company
    Inventor: Steven D. Draving