Patents by Inventor Steven Farrell

Steven Farrell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080088461
    Abstract: Systems and methods for providing expanded compatibility in identification tags such as RFID (Radio Frequency Identification) devices. Integrated devices can be equipped with various combinations of passive and active tags configured for compatibility with passive and active readers, respectively. Additionally, the integrated devices can be equipped with various combinations of passive and active tag readers for compatibility with passive and active tags, respectively. A first combination comprises an active tag and a passive tag reader for collecting information over a passive channel, and sending the information over an active channel. A second combination comprises an active tag and a passive tag receiver/transceiver for communication over both active and passive channels. A third combination comprises an active tag and an active tag reader for collecting information over an active channel, and sending information over an active channel.
    Type: Application
    Filed: September 26, 2006
    Publication date: April 17, 2008
    Inventors: LIPING Zhu, Allan Evans, Steven Farrell, Don Ahn
  • Publication number: 20070085688
    Abstract: Systems and methods for providing expanded compatibility in identification tags such as RFID (Radio Frequency Identification) devices. Integrated devices can be equipped with various combinations of passive and active tags configured for compatibility with passive and active readers, respectively. Additionally, the integrated devices can be equipped with various combinations of passive and active tag readers for compatibility with passive and active tags, respectively. A first combination comprises an active tag and a passive tag reader for collecting information over a passive channel, and sending the information over an active channel. A second combination comprises an active tag and a passive tag receiver/transceiver for communication over both active and passive channels. A third combination comprises an active tag and an active tag reader for collecting information over an active channel, and sending information over an active channel.
    Type: Application
    Filed: September 26, 2006
    Publication date: April 19, 2007
    Inventors: LIPING Zhu, Allan Evans, Steven Farrell, Don Ahn
  • Publication number: 20070008107
    Abstract: An apparatus includes a monitoring system having first and second portions adapted to be supported on a mobile arrangement that includes a container. The first portion has structure for monitoring a selected aspect of the container, and for transmitting from the first portion to the second portion a first wireless communication that includes first information relating to the selected aspect. The second portion has structure for broadcasting from the second portion to a remote location a second wireless communication that includes second information based on the first information.
    Type: Application
    Filed: June 21, 2005
    Publication date: January 11, 2007
    Applicant: Savi Technology, Inc.
    Inventors: Steven Farrell, Blair LaCorte, Ravindra Rajapakse
  • Publication number: 20060255944
    Abstract: An adapter has a cradle portion that can removably receive a radio frequency identification tag. A first electrical connector is positioned in the cradle portion so that, when a tag is removably received in the cradle portion, the first electrical connector electrically couples the adapter to the tag. A second electrical connector is disposed on the adapter at a location spaced from the cradle portion, and the adapter includes structure that electrically couples the first and second electrical connectors.
    Type: Application
    Filed: May 16, 2005
    Publication date: November 16, 2006
    Applicant: Savi Technology, Inc.
    Inventors: Timothy Redler, Nikola Cargonja, Steven Farrell
  • Publication number: 20060199625
    Abstract: A communications handset support for handless operation of a handheld communications device including a cradle assembly for releasably receiving and supporting the communications handset. The cradle assembly including a pair of elongate spaced-apart rods wherein a first resilient one of the elongate rods is fixed along a portion of its length so as to be cantilevered. A clamp is supported upon the pair of spaced-apart rods that includes a semi-hollow beam having a central passageway and that is supported a second one of the elongate rods. An adjustable beam is slidingly received within the central passageway of the semi-hollow beam, and is fastened to an end of the first resilient one of the rods so that when the adjustable beam is slid outwardly and away from the semi-hollow beam, the first resilient one of the rods is biased thereby gripping a portion of the communications handset.
    Type: Application
    Filed: February 10, 2006
    Publication date: September 7, 2006
    Inventor: Steven Farrell
  • Publication number: 20060144940
    Abstract: Systems and methods to provide multi-layer visibility of nested containers at a mobile checkpoint are disclosed. Thee systems include a portable deployment kit in communication with a nested container. The portable deployment kit can be contained in a durable carrying case having a total weight that is within military standards for carrying by one person and includes a handle. Inside, the carrying case can include foam or other material to protect internal components during transport and deployment. In use within the system, the portable deployment kit can serve as a self-contained checkpoint or site server for gathering necessary information from the nested container and uplinking for centralized data collection. In one embodiment, the portable deployment kit includes a label printer for updating an identification device on the nested container to reflect, for example, aggregation and deaggregation.
    Type: Application
    Filed: November 2, 2005
    Publication date: July 6, 2006
    Inventors: David Shannon, Steven Farrell, Stephen Lambright, Roderick Thorne, Blair LaCorte, Ravindra Rajapakse, Leo Chang
  • Publication number: 20060109109
    Abstract: A tag has a transmitter for transmitting first wireless signals, and a receiver for receiving second wireless signals from which the tag can determine its current physical location. A different embodiment includes a tag having a transmitter for transmitting wireless signals, and a reader having a receiver for receiving the wireless signals, the receiver in the reader being an ultra-sensitive receiver.
    Type: Application
    Filed: November 9, 2005
    Publication date: May 25, 2006
    Applicant: Savi Technology, Inc.
    Inventors: Ravindra Rajapakse, Liping Zhu, David Shannon, Steven Farrell
  • Publication number: 20060012481
    Abstract: An apparatus includes a carrier, and a system that is responsive to wireless signals transmitted by tags on items carried by the carrier for maintaining a local inventory of items carried by the carrier. A different apparatus involves a carrier having a container with an interior, a sensor for detecting a condition externally of the container that can be related to an environment within the container, and a system that handles information from the sensor in a manner facilitating an evaluation of the likelihood that a problem exists within the container. Another apparatus involves a carrier for a plurality of items, and a system that is responsive to wireless signals received from a remote location for determining a current location of the carrier and for evaluating whether the carrier is proceeding along an intended route.
    Type: Application
    Filed: July 15, 2005
    Publication date: January 19, 2006
    Applicant: Savi Technology, Inc.
    Inventors: Ravindra Rajapakse, Roderick Thorne, Robert Jennings, Steven Farrell, Liping Zhu
  • Publication number: 20050162270
    Abstract: An identification device establishes a relative hierarchy of associated containers as logistical units, providing multi-layer visibility of nested and adjacent containers. The relative hierarchy comprises lower-layer containers and upper-layer containers relative to the identification device. An integrated reader device reads heterogeneous tag types. This allows disparate tag types simultaneously using a single device.
    Type: Application
    Filed: December 9, 2004
    Publication date: July 28, 2005
    Inventors: Stephen Lambright, Blair LaCorte, Ravindra Rajapakse, David Shannon, Steven Farrell
  • Publication number: 20050151643
    Abstract: A container security system has a container interior monitor portion with a container interior light sensing portion responsive to visible light. A different embodiment involves a monitoring device with a support, a door engaging member movable to and from an operational position, and a detection portion that generates an electrical signal in response to movement of the member away from the operational position. The support may be configured to be supported on an edge portion of a movable door. Alternatively, the monitoring device may include a wireless communication portion, and circuitry responsive to the signal and operatively coupled to the wireless communication portion.
    Type: Application
    Filed: October 27, 2004
    Publication date: July 14, 2005
    Applicant: Savi Technology, Inc.
    Inventors: Ravindra Rajapakse, Steven Farrell, Mark Weidick, Nicholas Cova, John Goodell, Edward Schultheis, William Dawson
  • Publication number: 20050134457
    Abstract: A device has a support that can resiliently and removably grip an edge portion of a member with first and second portions thereof disposed on opposite sides of the member. A further portion on the first portion can operatively couple sensing structure to an electrical conductor portion on the third portion. A different embodiment has a support that can resiliently and removably grip an edge portion of a member with first and second portions thereof disposed on opposite sides of the member. A further portion on the support has circuitry coupled to a wireless communication portion on the first portion. Another embodiment has a support with structure supported thereon, the support resiliently and removably gripping the edge portion of a movable door with first and second portions of the support disposed on opposite sides of the edge portion.
    Type: Application
    Filed: October 27, 2004
    Publication date: June 23, 2005
    Applicant: Savi Technology, Inc.
    Inventors: Ravindra Rajapakse, Steven Farrell, Mark Weidick, Nicholas Cova, John Goodell, Edward Schultheis, William Dawson, Kent Merritt
  • Publication number: 20050126632
    Abstract: A beverage modification system having a container, a cap, a pouch and a pouch opener. A modification composition is contained within the pouch. The cap, containing the pouch, is secured onto the opening of a container containing a fruit-flavored liquid beverage composition. When the pouch opener is activated, the modification composition is released from the pouch and mixes with the liquid beverage composition to modify the color and flavor of the liquid beverage, resulting in a modified beverage composition.
    Type: Application
    Filed: December 11, 2003
    Publication date: June 16, 2005
    Inventors: Steven Farrell, Kathleen Elsen, Robert Swaine
  • Patent number: 6125444
    Abstract: A millimode capable computer system provides control to millicode to allow the BHT operations to continue except when the these special situations occur that require control of instruction fetch operations must be provided and the BHT can be turned off for some sections of code execution, but not disabled for all. A single free running BHT functions for both a normal mode and a millimode for the central processor which can execute in millimode with a branch history table directing instruction fetch for which both a global BHT disable and millicode disables exist. Hit detection logic receives input from the global BHT disable, as well as from an initialized control register bit and a processor control register bit to select the correct set target information and generate a "branch history table hit detected" control signal.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: September 26, 2000
    Assignee: International Business Machines Corporation
    Inventors: Mark Anthony Check, John Stephen Liptay, Timothy John Slegel, Charles Franklin Webb, Mark Steven Farrell
  • Patent number: 6119219
    Abstract: A pipelined multiprocessor system for ESA/390 operations which executes a simple instruction set in a hardware controlled execution unit and executes a complex instruction set in a milli-mode architected state with a millicode sequence of simple instructions in the hardware controlled execution unit, comprising a plurality of CPU processors each of which is part of said multiprocessing system and capable of generating and responding to a quiesce request, and controls for system operations which allow the CPUs in the ESA/390 system to process the local buffer update portion of IPTE and SSKE operations without waiting for all other processors to reach an interruptible point, and then to continue program execution with minor temporary restrictions on operations until the IPTE or SSKE operation is globally completed. In addition, Licensed Internal Code (LIC) sequences are defined which allow these IPTE and SSKE operations to co-exist with other operations which require conventional system quiescing (i.e.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: September 12, 2000
    Assignee: International Business Machines Corporation
    Inventors: Charles Franklin Webb, Dean G. Bair, Mark Steven Farrell, Barry Watson Krumm, Pak-kin Mak, Jennifer Almoradie Navarro, Timothy John Slegel
  • Patent number: 6108776
    Abstract: A millimode capable computer system provides control to millicode to allow the BHT operations to continue except when the these special situations occur that require control of instruction fetch operations must be provided and the BHT can be turned off for some sections of code execution, but not disabled for all. A single free running BHT functions for both a normal mode and a millimode for the central processor which can execute in millimode with a branch history table directing instruction fetch for which both a global BHT disable and millicode disables exist. Hit detection logic receives input from the global BHT disable, as well as from an initialized control register bit and a processor control register bit to select the correct set target information and generate a "branch history table hit detected" control signal.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: August 22, 2000
    Assignee: International Business Machines Corporation
    Inventors: Mark Anthony Check, John Stephen Liptay, Timothy John Slegel, Charles Franklin Webb, Mark Steven Farrell
  • Patent number: 6105109
    Abstract: SMP computers systems can add to the first level cache a fill mode latch and achieve straightforward, high-performance loading of a writable cache code array that is part of a hierarchical cache structure.A new code array's write control elements include a control latch called "fill mode" for the BCE controls which when fill mode is active, then a disable is also active, since reads of the code array may not give accurate data when the array is not yet filled-up/fully valid. New mode follows the sequential steps which process code by:a) purge the cache array; thenb) disable the code array; thenc) turn on fill mode with a buffer control element fill mode latch; and then processd) code increments once through a range of line addresses, where the range is at least as wide as the range(s) specified in the code array's lookup mechanism.e) turn off fill mode; thenf) purge the cache array again: and theng) enable the code array (turn off the code array disable bit).h) resume normal operation to end the sequence.
    Type: Grant
    Filed: February 19, 1998
    Date of Patent: August 15, 2000
    Assignee: International Business Machines Corporation
    Inventors: Barry Watson Krumm, Charles Franklin Webb, Timothy John Slegel, Mark Steven Farrell, Yuen Hung Chan
  • Patent number: 6079013
    Abstract: A pipelined multiprocessor system for ESA/390 operations which executes a simple instruction set in a hardware controlled execution unit and executes a complex instruction set in a milli-mode architected state with a millicode sequence of simple instructions in the hardware controlled execution unit, comprising a plurality of CPU processors each of which is part of said multiprocessing system and capable of generating and responding to a quiesce request, and controls for system operations which allow the CPUs in the ESA/390 system to process the local buffer update portion of IPTE and SSKE operations without waiting for all other processors to reach an interruptible point, and then to continue program execution with minor temporary restrictions on operations until the IPTE or SSKE operation is globally completed. In addition, Licensed Internal Code (LIC) sequences are defined which allow these IPTE and SSKE operations to co-exist with other operations which require conventional system quiescing (i.e.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: June 20, 2000
    Assignee: International Business Machines Corporation
    Inventors: Charles Franklin Webb, Dean G. Bair, Mark Steven Farrell, Barry Watson Krumm, Pak-kin Mak, Jennifer Almoradie Navarro, Timothy John Slegel
  • Patent number: 6058470
    Abstract: A computer system having a pipelined computer processor, which executes a relatively simple instruction set in a hardware controlled execution unit and executes a relatively complex instruction set in a milli-mode architected state with a millicode sequence of simple instructions in said hardware controlled execution unit, a millicode operating in a milli-mode state when macro-mode decoding by said processor is suspended to cause the system to subsequently use processor milli-registers and the processor's decoder decodes them and schedules them for execution upon entry into the processor milli-mode. Millicode flags allow specialized update and branch instructions and flags are either cleared or specifically set for a millicode instruction. A millicode instruction for editing functions processes one byte of an input pattern string, generates one byte of an output string, and updates various pointers and state indications to prepare for processing the next byte in a string.
    Type: Grant
    Filed: April 7, 1998
    Date of Patent: May 2, 2000
    Assignee: International Business Machines Corporation
    Inventors: Charles Franklin Webb, Mark Steven Farrell
  • Patent number: 6055624
    Abstract: A computer system having a pipelined computer processor, which executes a relatively simple instruction set in a hardware controlled execution unit and executes a relatively complex instruction set in a milli-mode architected state with a millicode sequence of simple instructions in said hardware controlled execution unit, a millicode operating in a milli-mode state when macro-mode decoding by said processor is suspended to cause the system to subsequently use processor milli-registers and the processor's decoder decodes them and schedules them for execution upon entry into the processor milli-mode. Millicode flags allow specialized update and branch instructions and flags are either cleared or specifically set for a millicode instruction. A millicode instruction for editing functions processes one byte of an input pattern string, generates one byte of an output string, and updates various pointers and state indications to prepare for processing the next byte in a string.
    Type: Grant
    Filed: April 7, 1998
    Date of Patent: April 25, 2000
    Assignee: International Business Machines Corporation
    Inventors: Charles Franklin Webb, Mark Steven Farrell, Timothy John Slegel
  • Patent number: 6044454
    Abstract: IEEE compliant floating point unit mechanism allows variability in the execution of floating point operations according to the IEEE 754 standard and allowing variability of the standard to co-exist in hardware or in the combination of hardware and millicode. The FPU has a detector of special conditions which dynamically detects an event that the hardware execution of an IEEE compliant Binary Floating Point instruction will require millicode emulation. The complete set of events which millicode may emulate are predetermined early in the design process of the hardware. An exception handling unit assist millicode emulation by trapping the result of an exceptional condition without invoking the trap handler. When an exceptional condition is detected during execution, the IEEE 754 standard requires two different actions under control of a mask bit. If the mask bit is on, the result is written into an FPR and the trap handler is invoked.
    Type: Grant
    Filed: February 19, 1998
    Date of Patent: March 28, 2000
    Assignee: International Business Machines Corporation
    Inventors: Eric Mark Schwarz, Christopher A. Krygowski, Timothy John Slegel, David Frazelle McManigal, Mark Steven Farrell