Abstract: Various embodiments are disclosed for providing machine learning routines with peripheral device data to infer driver activity and location. Peripheral device data may be collected on a peripheral device having a machine learning routine executing thereon to infer driver activity and perform improved estimation of driver location. Using driver activity and location estimation, contextually relevant delivery workflow assistance may be automatically provided to a delivery driver or other individual without requiring manual input, thereby improving driver safety and operational efficiency.

Abstract: Embodiments of the present disclosure generally relate to planarization of surfaces on substrates and on layers formed on substrates. More specifically, embodiments of the present disclosure relate to planarization of surfaces on substrates for advanced packaging applications, such as surfaces of polymeric material layers. In one implementation, the method includes mechanically grinding a substrate surface against a polishing surface in the presence of a grinding slurry during a first polishing process to remove a portion of a material formed on the substrate; and then chemically mechanically polishing the substrate surface against the polishing surface in the presence of a polishing slurry during a second polishing process to reduce any roughness or unevenness caused by the first polishing process.

Abstract: Methods and apparatus for forming a semiconductor structure such as an NMOS gate electrode are described. Methods may include depositing a first capping layer having a first surface atop a first surface of a high-k dielectric layer; and depositing at least one metal layer having a first surface atop the first surface of the first capping layer, wherein the at least one metal layer includes titanium aluminum silicide material. Some methods include removing an oxide layer from the first surface of the first capping layer by contacting the first capping layer with metal chloride in an amount sufficient to remove an oxide layer. Some methods for depositing a titanium aluminum silicide material are performed by an atomic layer deposition process performed at a temperature of 350 to 400 degrees Celsius.

Abstract: Methods and apparatus for forming a semiconductor structure with a scaled effective oxide thickness is disclosed. In embodiments, a method includes depositing amorphous silicon capping layer having a first surface atop a first surface of a titanium nitride (TiN) layer, wherein the titanium nitride layer is atop a first surface of a high-k dielectric layer disposed within a film stack; contacting the first surface of the amorphous silicon capping layer with a nitrogen containing gas; and annealing the film stack.

Abstract: Methods and apparatus for forming a semiconductor structure with a scaled effective oxide thickness is disclosed. In embodiments, a method includes depositing amorphous silicon capping layer having a first surface atop a first surface of a titanium nitride (TiN) layer, wherein the titanium nitride layer is atop a first surface of a high-k dielectric layer disposed within a film stack; contacting the first surface of the amorphous silicon capping layer with a nitrogen containing gas; and annealing the film stack.

Abstract: Methods and apparatus for forming a semiconductor structure such as an NMOS gate electrode are described. Methods may include depositing a first capping layer having a first surface atop a first surface of a high-k dielectric layer; and depositing at least one metal layer having a first surface atop the first surface of the first capping layer, wherein the at least one metal layer includes titanium aluminum silicide material. Some methods include removing an oxide layer from the first surface of the first capping layer by contacting the first capping layer with metal chloride in an amount sufficient to remove an oxide layer. Some methods for depositing a titanium aluminum silicide material are performed by an atomic layer deposition process performed at a temperature of 350 to 400 degrees Celsius.

Abstract: Provided are methods and apparatus for functionalizing a substrate surface used as the channel in a gate stack. Silicon, germanium and silicon germanium substrates surfaces are functionalized with one or more of sulfur and selenium by plasma processing.

Abstract: Described are methods for atomic layer deposition of films comprising mixed metal oxides using metal amidinate precursors. The mixed metal oxide films may comprise a lanthanide and a transition metal such as hafnium, zirconium or titanium. Such mixed metal oxide films may be used as dielectric layers in capacitors, transistors, dynamic random access memory cells, resistive random access memory cells, flash memory cells and display panels.

Abstract: Semiconductor device performance is improved via a gate structure having a tunable effective workfunction and reduced gate depletion effects. According to an example embodiment, the design threshold voltage of a semiconductor device is adjusted in a manner that includes providing a gate having a workfunction that enables operation of the semiconductor device at a selected voltage. The gate is formed having two different conductive materials with different electric workfunctions that both significantly contribute to the overall workfunction of the gate. The relative composition, thickness, and arrangement of each of the two conductive materials is selected to attain a gate electrode workfunction that is different than the workfunctions of each of the two layers and that sets the threshold voltage of the semiconductor device. The adjustability of the effective workfunction of the gate electrode can be applied to a variety of semiconductor devices.

Abstract: Provided are methods for depositing a cerium doped hafnium containing high-k dielectric film on a substrate. The reagents of specific methods include hafnium tetrachloride, an organometallic complex of cerium and water.

Abstract: Semiconductor device performance is improved via a gate structure having a tunable effective workfunction and reduced gate depletion effects. According to an example embodiment, the design threshold voltage of a semiconductor device is adjusted in a manner that includes providing a gate having a workfunction that enables operation of the semiconductor device at a selected voltage. The gate is formed having two different conductive materials with different electric workfunctions that both significantly contribute to the overall workfunction of the gate. The relative composition, thickness, and arrangement of each of the two conductive materials is selected to attain a gate electrode workfunction that is different than the workfunctions of each of the two layers and that sets the threshold voltage of the semiconductor device. The adjustability of the effective workfunction of the gate electrode can be applied to a variety of semiconductor devices.

Abstract: Provided are methods and apparatus for functionalizing a substrate surface used as the channel in a gate stack. Silicon, germanium and silicon germanium substrates surfaces are functionalized with one or more of sulfur and selenium by plasma processing.

Abstract: Described are methods for atomic layer deposition of films comprising mixed metal oxides using metal amidinate precursors. The mixed metal oxide films may comprise a lanthanide and a transition metal such as hafnium, zirconium or titanium. Such mixed metal oxide films may be used as dielectric layers in capacitors, transistors, dynamic random access memory cells, resistive random access memory cells, flash memory cells and display panels.

Abstract: Provided are methods for depositing a cerium doped hafnium containing high-k dielectric film on a substrate. The reagents of specific methods include hafnium tetrachloride, an organometallic complex of cerium and water.

Abstract: A deposition process including a dry etch process, followed by a deposition process of a high-k dielectric is disclosed. The dry etch process involves placing a substrate to be cleaned into a processing chamber to remove surface oxides. A gas mixture is energized to form a plasma of reactive gas which reacts with an oxide on the substrate, forming a thin film. The substrate is heated to vaporize the thin film and expose a substrate surface. The substrate surface is substantially free of oxides. Deposition is then used to form a layer on the substrate surface.

Abstract: Semiconductor device performance is improved via a gate structure having a tunable effective workfunction and reduced gate depletion effects. According to an example embodiment, the design threshold voltage of a semiconductor device is adjusted in a manner that includes providing a gate having a workfunction that enables operation of the semiconductor device at a selected voltage. The gate is formed having two different conductive materials with different electric workfunctions that both significantly contribute to the overall workfunction of the gate. The relative composition, thickness, and arrangement of each of the two conductive materials is selected to attain a gate electrode workfunction that is different than the workfunctions of each of the two layers and that sets the threshold voltage of the semiconductor device. The adjustability of the effective workfunction of the gate electrode can be applied to a variety of semiconductor devices.

Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material.

Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material.

Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material.

Abstract: A basic hoisting ring labeling means to provide clear and permanent label for safe operation includes a hook, a cylindrical base, a threaded bolt, and an annual recess; the hook being coupled to the cylindrical base, the threaded bolt securing a work piece; the annual recess defining an area to show specification information specific to the ring, highlighted by a particular base color, and shield from impacts and frictions from and with other objects to maintain always clear and legible to avoid dangers resulted from drop of the work piece due to broken hoisting ring when a wrong basic hoisting ring is selected.