Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material.

Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material.

Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material.

Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material.

Abstract: An improved structure hoist-use base hoisting ring comprised of a U-shaped clevis movably suspended from the two sides at the lower end of a cylindrical base mount as well as a circular top mounting bushing at the upper section and a bottom mounting bushing at the center section having an upwardly projecting neck and a passageway that are situated over the top and bottom lateral surfaces of a bore through the interior portion of the cylindrical base mount, enabling the installation of a bolt into the top mounting bushing center section and downward through the bottom mounting bushing and the fastening and positioning of its threaded section into the threaded hole of a weight at the lower end. Among the features of the present invention, an annular recess is disposed along the top surface and center section of the cylindrical base mount that provides for the nesting of a flat planar bearing.

Abstract: In a method of measuring at least one electrical property of a semiconductor wafer, an elastically deformable conductive contact formed from an electrically conductive coating overlaying an electrically conductive base material is provided. The base material has a first work function and the coating has a second work function. A first electrical contact is formed between the conductive contact and a top surface of a semiconductor wafer. A second electrical contact is formed with the semiconductor wafer. An electrical stimulus is applied between the first and second electrical contacts and a response of the semiconductor wafer to the electrical stimulus is measured. At least one electrical property of the semiconductor wafer is determined from the response.

Abstract: Semiconductor device (100) performance is improved via a gate structure (120) having a tunable effective workfunction and reduced gate depletion effects. According to an example embodiment of the present invention, the design threshold voltage of a semiconductor device (100) is adjusted in a manner that includes providing a gate having a workfunction that enables operation of the semiconductor device (100) at a selected voltage. The gate is formed having two different conductive materials (130, 135) with different electric workfunctions that both significantly contribute to the overall workfunction of the gate. The relative composition, thickness, and arrangement of each of the two conductive material is selected to attain a gate electrode workfunction that is different than the workfunctions of each of the two layers and that sets the threshold voltage of the semiconductor device (100). In addition, by selecting the order of the layers, carrier depletion in the gate electrode can be avoided.