Patents by Inventor Steven L. Rogers
Steven L. Rogers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240088615Abstract: The present disclosure relates to an aerosol delivery device. The aerosol delivery device may include a control body with a first connector portion and a cartridge with a second connector portion. The first connector portion and the second connector portion may be configured to releasably engage each other. One of the first connector portion and the second connector portion may include an extension and the other of the first connector portion and the second connector portion may include a receptacle configured to receive the extension. The extension may include contact sections positioned along a longitudinal length thereof. The contact sections may be electrically insulated from one another by at least one spacer and may be configured to form an electrical connection with the receptacle. A related assembly method is also provided.Type: ApplicationFiled: November 15, 2023Publication date: March 14, 2024Inventors: James William Rogers, Steven L. Worm, David G. Christopherson
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Patent number: 7895383Abstract: An information processing system is provided which includes a plurality of system resources, and an event queue having a maximum number of entries. An event recording mechanism of the information processing system is operable to make entries regarding events in the event queue, wherein the entries are limited to a predetermined number of active entries in the event queue per each type of event per each of the system resources. In a particular embodiment, the number of entries per each type of event for each of the system resources is limited to one.Type: GrantFiled: March 6, 2008Date of Patent: February 22, 2011Assignee: International Business Machines CorporationInventors: Thomas A. Gregg, Richard L. Arndt, Bruce L. Beukema, David Craddock, Ronald E. Fuhs, Steven L. Rogers, Donald W. Schmidt, Bruce M. Walk
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Patent number: 7873751Abstract: A method, computer program product, and data processing system for providing system-area network (SAN) multicasting functionality in a logically partitioned (LPAR) data processing system in which a channel adapter is shared among a plurality of logical partitions is disclosed. A preferred embodiment of the present invention allows LPAR “hypervisor” firmware to assume the responsibility for multicast protocol handling and distribution of packets among logical partitions.Type: GrantFiled: July 2, 2008Date of Patent: January 18, 2011Assignee: International Business Machines CorporationInventors: Richard Louis Arndt, Bruce Leroy Beukema, David F. Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Calvin Charles Paynton, Steven L. Rogers, Donald William Schmidt, Bruce Marshall Walk
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Patent number: 7555002Abstract: An aliased queue pair is provided within a logically partitioned data processing system for each logical partition for the single general services management queue pair that exists within a physical host channel adapter. Packets intended for the logical ports are received at the physical port. Multiple partitions exist within the data processing system. When one of these partitions needs to use one of the logical ports, a queue pair is selected. The queue pair is then associated with the logical port. The queue pair is configured as an aliased general services management queue pair and is used by the partition as if the aliased queue pair were the single general services management queue pair provided in the channel adapter.Type: GrantFiled: November 6, 2003Date of Patent: June 30, 2009Assignee: International Business Machines CorporationInventors: Richard Louis Arndt, Bruce Leroy Beukema, David F. Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Calvin Charles Paynton, Steven L. Rogers, Donald William Schmidt, Bruce Marshall Walk
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Publication number: 20080267183Abstract: A method, computer program product, and data processing system for providing system-area network (SAN) multicasting functionality in a logically partitioned (LPAR) data processing system in which a channel adapter is shared among a plurality of logical partitions is disclosed. A preferred embodiment of the present invention allows LPAR “hypervisor” firmware to assume the responsibility for multicast protocol handling and distribution of packets among logical partitions.Type: ApplicationFiled: July 2, 2008Publication date: October 30, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Richard Louis Arndt, Bruce Leroy Beukema, David F. Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Calvin Charles Paynton, Steven L. Rogers, Donald William Schmidt, Bruce Marshall Walk
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Patent number: 7428598Abstract: A method, computer program product, and data processing system for providing system-area network (SAN) multicasting functionality in a logically partitioned (LPAR) data processing system in which a channel adapter is shared among a plurality of logical partitions is disclosed. A preferred embodiment of the present invention allows LPAR “hypervisor” firmware to assume the responsibility for multicast protocol handling and distribution of packets among logical partitions.Type: GrantFiled: November 20, 2003Date of Patent: September 23, 2008Assignee: International Business Machines CorporationInventors: Richard Louis Arndt, Bruce Leroy Beukema, David F. Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Calvin Charles Paynton, Steven L. Rogers, Donald William Schmidt, Bruce Marshall Walk
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Publication number: 20080196041Abstract: An information processing system is provided which includes a plurality of system resources, and an event queue having a maximum number of entries. An event recording mechanism of the information processing system is operable to make entries regarding events in the event queue, wherein the entries are limited to a predetermined number of active entries in the event queue per each type of event per each of the system resources. In a particular embodiment, the number of entries per each type of event for each of the system resources is limited to one.Type: ApplicationFiled: March 6, 2008Publication date: August 14, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas A. Gregg, Richard L. Arndt, Bruce L. Beukema, David Craddock, Ronald E. Fuhs, Steven L. Rogers, Donald W. Schmidt, Bruce M. Walk
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Patent number: 7366813Abstract: An information processing system is provided which includes a plurality of system resources, and an event queue having a predetermined number of entries. An event recording mechanism of the information processing system is operable to make entries regarding events in the event queue, wherein the entries are limited to a predetermined number of active entries in the event queue per each type of event per each of the system resources. In a particular embodiment, the number of entries per each type of event for each of the system resources is limited to one.Type: GrantFiled: June 19, 2007Date of Patent: April 29, 2008Assignee: International Business Machines CorporationInventors: Thomas A. Gregg, Richard L. Arndt, Bruce L. Beukema, David Craddock, Ronald E. Fuhs, Steven L. Rogers, Donald W. Schmidt, Bruce M. Walk
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Patent number: 7324525Abstract: A method for coalescing acknowledge packets within a server is disclosed. A Read Request queue having multiple queue pair entries is provided. Each of the queue pair entries includes a packet sequence number (PSN) field and an indicator field. In response to a receipt of a Write Request packet, an indicator field of a queue pair entry is set to indicate that an Ack packet has been queued within the queue pair entry, and a PSN of the Write Request packet is written into a PSN field of the queue pair entry. In addition, a Queue Write Pointer is maintained to point to the queue pair entry. In response to a receipt of a Read Request packet, the indicator field of the queue pair entry is set to indicate that a Read Request packet has been queued within the queue pair entry, and a PSN of the Read Request packet is written into the PSN field of the queue pair entry. Also, the Queue Write Pointer is advanced to point to a queue pair entry that is subsequent to the queue pair entry.Type: GrantFiled: December 9, 2004Date of Patent: January 29, 2008Assignee: International Business Machines CorporationInventors: Ronald E. Fuhs, Calvin C. Paynton, Steven L. Rogers, Nathaniel P. Sellin, Scott M. Willenborg
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Patent number: 7290077Abstract: An information processing system is provided which includes a plurality of system resources, and an event queue having a maximum number of entries. An event recording mechanism of the information processing system is operable to make entries regarding events in the event queue, wherein the entries are limited to a predetermined number of active entries in the event queue per each type of event per each of the system resources. In a particular embodiment, the number of entries per each type of event for each of the system resources is limited to one.Type: GrantFiled: April 7, 2005Date of Patent: October 30, 2007Assignee: International Business Machines CorporationInventors: Thomas A. Gregg, Richard L. Arndt, Bruce L. Beukema, David Craddock, Ronald E. Fuhs, Steven L. Rogers, Donald W. Schmidt, Bruce M. Walk
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Patent number: 7283473Abstract: An apparatus, system and method for providing multiple logical partitions in a system area network are provided Logical partitioning support is provided for host channel adapters which allows multiple operating systems to share the resources of a single physical host channel adapter (HCA). The apparatus, system and method ensures that each operating system is unaware that the HCA hardware resources are being shared with other operating systems and further guarantees that the individual operating systems are prevented from accessing HCA hardware resources which are associated with other operating systems.Type: GrantFiled: April 10, 2003Date of Patent: October 16, 2007Assignee: International Business Machines CorporationInventors: Richard Louis Arndt, Bruce Leroy Beukema, David F. Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Allan Samuel Meritt, Calvin Charles Paynton, Steven L. Rogers, Donald William Schmidt, Bruce Marshall Walk
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Patent number: 6938138Abstract: A method and apparatus for accessing a memory. Access rights for a memory operation are verified using a first data structure in response to receiving a request to perform the operation, wherein the request includes a virtual address for the operation. Responsive to access rights being verified for the memory operation, the virtual address translated into a real address using a second data structure.Type: GrantFiled: January 11, 2001Date of Patent: August 30, 2005Assignee: International Business Machines CorporationInventors: Bruce Leroy Beukema, David Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Gregory Francis Pfister, Renato John Recio, Steven L. Rogers
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Publication number: 20040202189Abstract: An apparatus, system and method for providing multiple logical partitions in a system area network are provided Logical partitioning support is provided for host channel adapters which allows multiple operating systems to share the resources of a single physical host channel adapter (HCA). The apparatus, system and method ensures that each operating system is unaware that the HCA hardware resources are being shared with other operating systems and further guarantees that the individual operating systems are prevented from accessing HCA hardware resources which are associated with other operating systems.Type: ApplicationFiled: April 10, 2003Publication date: October 14, 2004Applicant: International Business Machines CorporationInventors: Richard Louis Arndt, Bruce Leroy Beukema, David F. Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Allan Samuel Meritt, Calvin Charles Paynton, Steven L. Rogers, Donald William Schmidt, Bruce Marshall Walk
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Patent number: 6601148Abstract: A method, system and program for controlling access to memory areas within a computer are provided. The invention comprises placing a first Bind Work Queue Element (WQE) at the head of a work queue, wherein the first Bind WQE defines parameters associated with a first Memory Window. A set of Work Requests is then placed on the work queue, behind the first Bind WQE wherein the work requests invoke operations that access the first Memory Window. A second Bind WQE is then placed on the work queue, behind the first set of Work Requests. This second Bind WQE defines parameters associated with a second Memory Window. A second set of Work Requests is placed on the work queue behind the second Bind WQE and invoke operations that access the second memory window. The Memory Windows can be associated with a common Memory Region and have different addresses and lengths or different access rights. In another embodiment, the first and second Memory Windows can be associated with different Memory Regions.Type: GrantFiled: March 1, 2001Date of Patent: July 29, 2003Assignee: International Business Machines CorporationInventors: Bruce Leroy Beukema, David F. Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Renato John Recio, Steven L. Rogers, Bruce Marshall Walk
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Patent number: 6578122Abstract: A method, system and program for controlling access to computer memory are provided. The present invention comprises receiving a work request from a user, wherein the work request comprises an index portion and a protection portion. The index portion of the work request is used to locate an element in an address translation and protection table. The protection portion of the work request is then compared with a protection key in the table element, and access to memory is granted only if the protection portion and protection key match.Type: GrantFiled: March 1, 2001Date of Patent: June 10, 2003Assignee: International Business Machines CorporationInventors: Bruce Leroy Beukema, David F. Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Renato John Recio, Steven L. Rogers, Bruce Marshall Walk
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Publication number: 20020124148Abstract: A method, system and program for controlling access to computer memory are provided. The present invention comprises receiving a work request from a user, wherein the work request comprises an index portion and a protection portion. The index portion of the work request is used to locate an element in an address translation and protection table. The protection portion of the work request is then compared with a protection key in the table element, and access to memory is granted only if the protection portion and protection key match.Type: ApplicationFiled: March 1, 2001Publication date: September 5, 2002Applicant: IBM CorporationInventors: Bruce Leroy Beukema, David F. Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Renato John Recio, Steven L. Rogers, Bruce Marshall Walk
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Publication number: 20020124117Abstract: A method, system and program for controlling access to memory areas within a computer are provided. The invention comprises placing a first Bind Work Queue Element (WQE) at the head of a work queue, wherein the first Bind WQE defines parameters associated with a first Memory Window. A set of Work Requests is then placed on the work queue, behind the first Bind WQE wherein the work requests invoke operations that access the first Memory Window. A second Bind WQE is then placed on the work queue, behind the first set of Work Requests. This second Bind WQE defines parameters associated with a second Memory Window. A second set of Work Requests is placed on the work queue behind the second Bind WQE and invoke operations that access the second memory window. The Memory Windows can be associated with a common Memory Region and have different addresses and lengths or different access rights. In another embodiment, the first and second Memory Windows can be associated with different Memory Regions.Type: ApplicationFiled: March 1, 2001Publication date: September 5, 2002Applicant: IBM CorporationInventors: Bruce Leroy Beukema, David F. Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Renato John Recio, Steven L. Rogers, Bruce Marshall Walk
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Publication number: 20020091841Abstract: A method and apparatus for accessing a memory. Access rights for a memory operation are verified using a first data structure in response to receiving a request to perform the operation, wherein the request includes a virtual address for the operation. Responsive to access rights being verified for the memory operation, the virtual address translated into a real address using a second data structure.Type: ApplicationFiled: January 11, 2001Publication date: July 11, 2002Applicant: International Business Machines CorporationInventors: Bruce Leroy Beukema, David Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Gregory Francis Pfister, Renato John Recio, Steven L. Rogers
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Publication number: 20020073257Abstract: A method, system, and apparatus for processing foreign protocol requests, such as PCI transactions, across a system area network (SAN) utilizing a data packet protocol is provided while maintaining the other SAN traffic. In one embodiment, a HCA receives a request for a load or store operation from a processor to an I/O adapter using a protocol which is foreign to the system area network, such as a PCI bus protocol. The HCA encapsulates the request into a data packet and places appropriate headers and trailers in the data packet to ensure that the data packet is delivered across the SAN fabric to an appropriate TCA to which the requested I/O adapter is connected. The TCA receives the data packet, determines that it contains a foreign protocol request, and decodes the data packet to obtain the foreign protocol request. The foreign protocol request is then transmitted to the appropriate I/O adapter.Type: ApplicationFiled: December 7, 2000Publication date: June 13, 2002Applicant: IBM CorporationInventors: Bruce Leroy Beukema, Ronald Edward Fuhs, Danny Marvin Neal, Renato John Recio, Steven L. Rogers, Steven Mark Thurber, Bruce Marshall Walk
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Patent number: RE44577Abstract: A private communication network through which a plurality of member users communicate using the public switched telephone network (PSTN) is disclosed herein. Each member user utilizes either a modified land line telephone directly connected to PSTN, or uses a modified mobile telephone operatively coupled to the PSTN through a wireless communication system. The private communication network includes network call manager having a telephone network interface for establishing a telephone connection with each of a plurality of telephone lines of the PSTN. Each of the plurality of telephone lines is associated with one of the plurality of member users. The network call manager further includes a switch matrix, coupled to the telephone network interface, for providing an information signal received from an active member user over a selected telephone line to the remaining non-active member users.Type: GrantFiled: June 14, 2001Date of Patent: November 5, 2013Assignee: QUALCOMM IncorporatedInventors: Byron Y. Yafuso, Matthew S. Grob, Eric J. Lekven, Steven L. Rogers