Abstract: Unpinned epitaxial metal-oxide-compound semiconductor structures are disclosed and a method of fabricating such structures is described. Epitaxial layers of compound semiconductor are grown by MBE which result in the formation of a smooth surface having a stabilized reconstruction. An elemental semiconductor layer is deposited epitaxially in-situ with the compound semiconductor layer which unpins the surface Fermi level. A layer of insulator material is then deposited on the elemental semiconductor layer by PECVD. In one embodiment, the compound semiconductor is GaAs and the elemental semiconductor is Si. The insulator material is a layer of high quality SiO.sub.2. A metal gate is deposited on the SiO.sub.2 layer to form an MOS device. The epitaxial GaAs layer has a density of states which permits the interface Fermi level to be moved through the entire forbidden energy gap. In another embodiment, the SiO.sub.

Abstract: An environmental interface for a semiconductor electro-optical conversion device layer that is optically transparent, electrically conductive and chemically passivating, made of an elemental semiconductor with an indirect band gap>1 electron volt in a layer between 20 and 200 Angstroms thick. A GaAs covered by GaAlAs converter with a 100 Angstrom Si layer over the GaAlAs is illustrated.

Abstract: In a semiconductor device, a contact with low resistance to a III-V compound semiconductor substrate was fabricated using refractory materials and small amounts of indium as the contact material. The contact material was formed by depositing Mo, Ge and W with small amounts of In onto doped GaAs wafers. The contact resistance less than 1.0 ohm millimeter was obtained after annealing at 800.degree. C. and the resistance did not increase after subsequent prolonged annealing at 400.degree. C.

Abstract: Control of the Fermi level pinning problem and the production of flat band surface performance in compound semiconductors is achieved by providing a cationic oxide free of anionic species on the surface of the semiconductor for flat band performance and with a localized inclusion of some anionic species for barrier performance so that oxide and metal work function responsiveness is available in structure and performance in MOSFET, MESFET and different work function metal FET structures. A cationic gallium oxide is produced on GaAs by oxide growth during illumination and while being rinsed with oxygenated water. The oxidation is used to produce both anionic and cationic species while the rinsing process selectively removes all the anionic species.

Abstract: A field effect transistor structure suitable for use in an array of such structures disposed on a common substrate (14) is formed with a source terminal (22), a drain (24) terminal, and a gate terminal (26) upon an upper surface of a semiconductor chip. The chip includes a first layer (18) and a second layer (20), the first layer being grown epitaxially upon the second layer. The first layer forms a part of the gate terminal and the second layer includes a charge conduction channel coupling the source region and the drain region. A pocket layer (16) is disposed in the second layer beneath the terminals of the transistor structure and is doped with either an donor dopant or an acceptor dopant for altering the electric field at the conduction channel to insert electrons or remove electrons therefrom so as to convert an operating mode from either an enhancement mode to a depletion mode or from a depletion mode to an enchancement mode.

Abstract: A quantity of silicon serving as a source of the element silicon for use in a molecular beam epitaxial growth apparatus where the silicon is in the form of a monocrystalline wafer with a plurality of electrically parallel filaments separated by slots that pass completely through the wafer, each filament having a length dimension that is greater than the width and height dimensions, joined at a broad contact area at each filament end and where an electric current is passed through the filaments through the broad contact areas.