Patents by Inventor Steven Li

Steven Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7130883
    Abstract: A distributed collaborative computer system is provided that comprises a plurality of server computers interconnected via a high-speed link. Client computers can connect to any available server computer and start or join a conference hosted on either the server computer to which the client computer is connected or any other server in the system. As a result, the system and method of the present invention is easily scalable to support an arbitrary number of participants to a conference by merely adding the appropriate number of server computers to the system. In addition, by replicating the conference information on more than one server computer, the single point of failure limitation is eliminated. In fact, if a server hosting or participating in a conference malfunctions, the failure is detected by other server computers and the client computer is able to reconnect to the conference through a new server computer.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: October 31, 2006
    Assignee: WebEx Communications, Inc.
    Inventors: Min Zhu, Jian Shen, Steven Li, Guanghong Yang, Bin Zhao, Shi Yan, Zheng Yuan
  • Publication number: 20040142129
    Abstract: The gas permeance of polyester bottles or other packaging article is improved by the combination of an oxygen scavenging material provided in the wall of the article and an external barrier to gas flow.
    Type: Application
    Filed: December 1, 2003
    Publication date: July 22, 2004
    Inventors: Lindsay Mulholland, Nina Goodrich, David Senior, Boris Chiu, Steven Li
  • Publication number: 20030167301
    Abstract: A distributed collaborative computer system is provided that comprises a plurality of server computers interconnected via a high-speed link. Client computers can connect to any available server computer and start or join a conference hosted on either the server computer to which the client computer is connected or any other server in the system. As a result, the system and method of the present invention is easily scalable to support an arbitrary number of participants to a conference by merely adding the appropriate number of server computers to the system. In addition, by replicating the conference information on more than one server computer, the single point of failure limitation is eliminated. In fact, if a server hosting or participating in a conference malfunctions, the failure is detected by other server computers and the client computer is able to reconnect to the conference through a new server computer.
    Type: Application
    Filed: December 29, 2000
    Publication date: September 4, 2003
    Inventors: Min Zhu, Jian Shen, Steven Li, Guanghong Yang, Bin Zhao, Shi Yan, Zheng Yuan
  • Patent number: 6515929
    Abstract: A pseudo SRAM integrated circuit device is achieved. The device comprises, first, a memory array comprising a plurality of dynamic storage cells. Finally, an access controller is included. The access controller provides read and write access to the memory array from an external device. The access controller performance is compatible with a standard SRAM memory device. The access controller enables a partial data retention mode comprising selective refreshing of at least one part of the memory array and non-refreshing of at least one other part of the memory array.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: February 4, 2003
    Assignee: Etron Technology, Inc.
    Inventors: Tah-Kang Joseph Ting, Steven Li
  • Patent number: 6286128
    Abstract: A method for design optimization using logical and physical information is provided. In one embodiment, a method for design optimization using logical and physical information, includes receiving a behavioral description of an integrated circuit or a portion of an integrated circuit, optimizing placement of circuit elements in accordance with a first cost function, and optimizing logic of the circuit elements in accordance with a second cost function, in which the optimizing placement of the circuit elements and the optimizing logic of the circuit elements are performed concurrently. The method can further include optimizing routing in accordance with a third cost function, in which the optimizing routing, the optimizing placement of the circuit elements, and the optimizing logic of the circuit elements are performed concurrently.
    Type: Grant
    Filed: June 12, 1998
    Date of Patent: September 4, 2001
    Assignee: Monterey Design Systems, Inc.
    Inventors: Lawrence Pileggi, Majid Sarrafzadeh, Sharad Malik, Abhijeet Chakraborty, Archie Li, Robert Eugene Shortt, Christopher Dunn, David Gluss, Dennis Yamamoto, Dinesh Gaitonde, Douglas B. Boyle, Emre Tuncer, Eric McCaughrin, Feroze Peshotan Taraporevala, Gary K. Yeap, James S. Koford, Joseph T. Rahmeh, Lilly Shieh, Salil R. Raje, Sam Jung Kim, Satamurthy Pullela, Yau-Tsun Steven Li, Tong Gao